diff options
Diffstat (limited to 'Ryujinx.Tests/Cpu')
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTest.cs | 494 | ||||
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestAluBinary.cs | 238 | ||||
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestAluRs.cs | 224 | ||||
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestMisc.cs | 82 | ||||
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimd.cs | 491 | ||||
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimdCrypto.cs | 64 | ||||
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimdCvt.cs | 35 | ||||
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimdExt.cs | 16 | ||||
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimdFcond.cs | 23 | ||||
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimdFmov.cs | 8 | ||||
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimdImm.cs | 19 | ||||
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimdIns.cs | 82 | ||||
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimdReg.cs | 933 | ||||
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimdRegElem.cs | 28 | ||||
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimdRegElemF.cs | 51 | ||||
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimdShImm.cs | 107 | ||||
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimdTbl.cs | 69 |
17 files changed, 1438 insertions, 1526 deletions
diff --git a/Ryujinx.Tests/Cpu/CpuTest.cs b/Ryujinx.Tests/Cpu/CpuTest.cs index b147cf44..1e7b75c6 100644 --- a/Ryujinx.Tests/Cpu/CpuTest.cs +++ b/Ryujinx.Tests/Cpu/CpuTest.cs @@ -1,7 +1,6 @@ -using ChocolArm64; -using ChocolArm64.Memory; -using ChocolArm64.State; -using ChocolArm64.Translation; +using ARMeilleure.Memory; +using ARMeilleure.State; +using ARMeilleure.Translation; using NUnit.Framework; @@ -9,24 +8,24 @@ using Ryujinx.Tests.Unicorn; using System; using System.Runtime.InteropServices; -using System.Runtime.Intrinsics; -using System.Runtime.Intrinsics.X86; -using System.Threading; namespace Ryujinx.Tests.Cpu { [TestFixture] public class CpuTest { - protected long Position { get; private set; } - private long _size; + private ulong _currAddress; + private long _size; - private long _entryPoint; + private ulong _entryPoint; private IntPtr _ramPointer; private MemoryManager _memory; - private CpuThread _thread; + + private ExecutionContext _context; + + private Translator _translator; private static bool _unicornAvailable; private UnicornAArch64 _unicornEmu; @@ -44,24 +43,24 @@ namespace Ryujinx.Tests.Cpu [SetUp] public void Setup() { - Position = 0x1000; - _size = 0x1000; + _currAddress = 0x1000; + _size = 0x1000; - _entryPoint = Position; + _entryPoint = _currAddress; _ramPointer = Marshal.AllocHGlobal(new IntPtr(_size)); _memory = new MemoryManager(_ramPointer); - _memory.Map(Position, 0, _size); + _memory.Map((long)_currAddress, 0, _size); - Translator translator = new Translator(_memory); + _context = new ExecutionContext(); - _thread = new CpuThread(translator, _memory, _entryPoint); + _translator = new Translator(_memory); if (_unicornAvailable) { _unicornEmu = new UnicornAArch64(); - _unicornEmu.MemoryMap((ulong)Position, (ulong)_size, MemoryPermission.READ | MemoryPermission.EXEC); - _unicornEmu.PC = (ulong)_entryPoint; + _unicornEmu.MemoryMap(_currAddress, (ulong)_size, MemoryPermission.READ | MemoryPermission.EXEC); + _unicornEmu.PC = _entryPoint; } } @@ -70,7 +69,8 @@ namespace Ryujinx.Tests.Cpu { Marshal.FreeHGlobal(_ramPointer); _memory = null; - _thread = null; + _context = null; + _translator = null; _unicornEmu = null; } @@ -82,51 +82,61 @@ namespace Ryujinx.Tests.Cpu protected void Opcode(uint opcode) { - _thread.Memory.WriteUInt32(Position, opcode); + _memory.WriteUInt32((long)_currAddress, opcode); if (_unicornAvailable) { - _unicornEmu.MemoryWrite32((ulong)Position, opcode); + _unicornEmu.MemoryWrite32((ulong)_currAddress, opcode); } - Position += 4; + _currAddress += 4; } - protected void SetThreadState(ulong x0 = 0, ulong x1 = 0, ulong x2 = 0, ulong x3 = 0, ulong x31 = 0, - Vector128<float> v0 = default(Vector128<float>), - Vector128<float> v1 = default(Vector128<float>), - Vector128<float> v2 = default(Vector128<float>), - Vector128<float> v3 = default(Vector128<float>), - Vector128<float> v4 = default(Vector128<float>), - Vector128<float> v5 = default(Vector128<float>), - Vector128<float> v30 = default(Vector128<float>), - Vector128<float> v31 = default(Vector128<float>), - bool overflow = false, bool carry = false, bool zero = false, bool negative = false, - int fpcr = 0x0, int fpsr = 0x0) - { - _thread.ThreadState.X0 = x0; - _thread.ThreadState.X1 = x1; - _thread.ThreadState.X2 = x2; - _thread.ThreadState.X3 = x3; - - _thread.ThreadState.X31 = x31; - - _thread.ThreadState.V0 = v0; - _thread.ThreadState.V1 = v1; - _thread.ThreadState.V2 = v2; - _thread.ThreadState.V3 = v3; - _thread.ThreadState.V4 = v4; - _thread.ThreadState.V5 = v5; - _thread.ThreadState.V30 = v30; - _thread.ThreadState.V31 = v31; - - _thread.ThreadState.Overflow = overflow; - _thread.ThreadState.Carry = carry; - _thread.ThreadState.Zero = zero; - _thread.ThreadState.Negative = negative; - - _thread.ThreadState.Fpcr = fpcr; - _thread.ThreadState.Fpsr = fpsr; + protected ExecutionContext GetContext() => _context; + + protected void SetContext(ulong x0 = 0, + ulong x1 = 0, + ulong x2 = 0, + ulong x3 = 0, + ulong x31 = 0, + V128 v0 = default(V128), + V128 v1 = default(V128), + V128 v2 = default(V128), + V128 v3 = default(V128), + V128 v4 = default(V128), + V128 v5 = default(V128), + V128 v30 = default(V128), + V128 v31 = default(V128), + bool overflow = false, + bool carry = false, + bool zero = false, + bool negative = false, + int fpcr = 0, + int fpsr = 0) + { + _context.SetX(0, x0); + _context.SetX(1, x1); + _context.SetX(2, x2); + _context.SetX(3, x3); + + _context.SetX(31, x31); + + _context.SetV(0, v0); + _context.SetV(1, v1); + _context.SetV(2, v2); + _context.SetV(3, v3); + _context.SetV(4, v4); + _context.SetV(5, v5); + _context.SetV(30, v30); + _context.SetV(31, v31); + + _context.SetPstateFlag(PState.VFlag, overflow); + _context.SetPstateFlag(PState.CFlag, carry); + _context.SetPstateFlag(PState.ZFlag, zero); + _context.SetPstateFlag(PState.NFlag, negative); + + _context.Fpcr = (FPCR)fpcr; + _context.Fpsr = (FPSR)fpsr; if (_unicornAvailable) { @@ -137,14 +147,14 @@ namespace Ryujinx.Tests.Cpu _unicornEmu.SP = x31; - _unicornEmu.Q[0] = v0; - _unicornEmu.Q[1] = v1; - _unicornEmu.Q[2] = v2; - _unicornEmu.Q[3] = v3; - _unicornEmu.Q[4] = v4; - _unicornEmu.Q[5] = v5; - _unicornEmu.Q[30] = v30; - _unicornEmu.Q[31] = v31; + _unicornEmu.Q[0] = V128ToSimdValue(v0); + _unicornEmu.Q[1] = V128ToSimdValue(v1); + _unicornEmu.Q[2] = V128ToSimdValue(v2); + _unicornEmu.Q[3] = V128ToSimdValue(v3); + _unicornEmu.Q[4] = V128ToSimdValue(v4); + _unicornEmu.Q[5] = V128ToSimdValue(v5); + _unicornEmu.Q[30] = V128ToSimdValue(v30); + _unicornEmu.Q[31] = V128ToSimdValue(v31); _unicornEmu.OverflowFlag = overflow; _unicornEmu.CarryFlag = carry; @@ -158,43 +168,41 @@ namespace Ryujinx.Tests.Cpu protected void ExecuteOpcodes() { - using (ManualResetEvent wait = new ManualResetEvent(false)) - { - _thread.ThreadState.Break += (sender, e) => _thread.StopExecution(); - _thread.WorkFinished += (sender, e) => wait.Set(); - - _thread.Execute(); - wait.WaitOne(); - } + _translator.Execute(_context, _entryPoint); if (_unicornAvailable) { - _unicornEmu.RunForCount((ulong)(Position - _entryPoint - 8) / 4); + _unicornEmu.RunForCount((ulong)(_currAddress - _entryPoint - 4) / 4); } } - protected CpuThreadState GetThreadState() => _thread.ThreadState; - - protected CpuThreadState SingleOpcode(uint opcode, - ulong x0 = 0, ulong x1 = 0, ulong x2 = 0, ulong x3 = 0, ulong x31 = 0, - Vector128<float> v0 = default(Vector128<float>), - Vector128<float> v1 = default(Vector128<float>), - Vector128<float> v2 = default(Vector128<float>), - Vector128<float> v3 = default(Vector128<float>), - Vector128<float> v4 = default(Vector128<float>), - Vector128<float> v5 = default(Vector128<float>), - Vector128<float> v30 = default(Vector128<float>), - Vector128<float> v31 = default(Vector128<float>), - bool overflow = false, bool carry = false, bool zero = false, bool negative = false, - int fpcr = 0x0, int fpsr = 0x0) + protected ExecutionContext SingleOpcode(uint opcode, + ulong x0 = 0, + ulong x1 = 0, + ulong x2 = 0, + ulong x3 = 0, + ulong x31 = 0, + V128 v0 = default(V128), + V128 v1 = default(V128), + V128 v2 = default(V128), + V128 v3 = default(V128), + V128 v4 = default(V128), + V128 v5 = default(V128), + V128 v30 = default(V128), + V128 v31 = default(V128), + bool overflow = false, + bool carry = false, + bool zero = false, + bool negative = false, + int fpcr = 0, + int fpsr = 0) { Opcode(opcode); - Opcode(0xD4200000); // BRK #0 Opcode(0xD65F03C0); // RET - SetThreadState(x0, x1, x2, x3, x31, v0, v1, v2, v3, v4, v5, v30, v31, overflow, carry, zero, negative, fpcr, fpsr); + SetContext(x0, x1, x2, x3, x31, v0, v1, v2, v3, v4, v5, v30, v31, overflow, carry, zero, negative, fpcr, fpsr); ExecuteOpcodes(); - return GetThreadState(); + return GetContext(); } /// <summary>Rounding Mode control field.</summary> @@ -279,101 +287,101 @@ namespace Ryujinx.Tests.Cpu ManageFpSkips(fpSkips); } - Assert.That(_thread.ThreadState.X0, Is.EqualTo(_unicornEmu.X[0])); - Assert.That(_thread.ThreadState.X1, Is.EqualTo(_unicornEmu.X[1])); - Assert.That(_thread.ThreadState.X2, Is.EqualTo(_unicornEmu.X[2])); - Assert.That(_thread.ThreadState.X3, Is.EqualTo(_unicornEmu.X[3])); - Assert.That(_thread.ThreadState.X4, Is.EqualTo(_unicornEmu.X[4])); - Assert.That(_thread.ThreadState.X5, Is.EqualTo(_unicornEmu.X[5])); - Assert.That(_thread.ThreadState.X6, Is.EqualTo(_unicornEmu.X[6])); - Assert.That(_thread.ThreadState.X7, Is.EqualTo(_unicornEmu.X[7])); - Assert.That(_thread.ThreadState.X8, Is.EqualTo(_unicornEmu.X[8])); - Assert.That(_thread.ThreadState.X9, Is.EqualTo(_unicornEmu.X[9])); - Assert.That(_thread.ThreadState.X10, Is.EqualTo(_unicornEmu.X[10])); - Assert.That(_thread.ThreadState.X11, Is.EqualTo(_unicornEmu.X[11])); - Assert.That(_thread.ThreadState.X12, Is.EqualTo(_unicornEmu.X[12])); - Assert.That(_thread.ThreadState.X13, Is.EqualTo(_unicornEmu.X[13])); - Assert.That(_thread.ThreadState.X14, Is.EqualTo(_unicornEmu.X[14])); - Assert.That(_thread.ThreadState.X15, Is.EqualTo(_unicornEmu.X[15])); - Assert.That(_thread.ThreadState.X16, Is.EqualTo(_unicornEmu.X[16])); - Assert.That(_thread.ThreadState.X17, Is.EqualTo(_unicornEmu.X[17])); - Assert.That(_thread.ThreadState.X18, Is.EqualTo(_unicornEmu.X[18])); - Assert.That(_thread.ThreadState.X19, Is.EqualTo(_unicornEmu.X[19])); - Assert.That(_thread.ThreadState.X20, Is.EqualTo(_unicornEmu.X[20])); - Assert.That(_thread.ThreadState.X21, Is.EqualTo(_unicornEmu.X[21])); - Assert.That(_thread.ThreadState.X22, Is.EqualTo(_unicornEmu.X[22])); - Assert.That(_thread.ThreadState.X23, Is.EqualTo(_unicornEmu.X[23])); - Assert.That(_thread.ThreadState.X24, Is.EqualTo(_unicornEmu.X[24])); - Assert.That(_thread.ThreadState.X25, Is.EqualTo(_unicornEmu.X[25])); - Assert.That(_thread.ThreadState.X26, Is.EqualTo(_unicornEmu.X[26])); - Assert.That(_thread.ThreadState.X27, Is.EqualTo(_unicornEmu.X[27])); - Assert.That(_thread.ThreadState.X28, Is.EqualTo(_unicornEmu.X[28])); - Assert.That(_thread.ThreadState.X29, Is.EqualTo(_unicornEmu.X[29])); - Assert.That(_thread.ThreadState.X30, Is.EqualTo(_unicornEmu.X[30])); - - Assert.That(_thread.ThreadState.X31, Is.EqualTo(_unicornEmu.SP)); + Assert.That(_context.GetX(0), Is.EqualTo(_unicornEmu.X[0])); + Assert.That(_context.GetX(1), Is.EqualTo(_unicornEmu.X[1])); + Assert.That(_context.GetX(2), Is.EqualTo(_unicornEmu.X[2])); + Assert.That(_context.GetX(3), Is.EqualTo(_unicornEmu.X[3])); + Assert.That(_context.GetX(4), Is.EqualTo(_unicornEmu.X[4])); + Assert.That(_context.GetX(5), Is.EqualTo(_unicornEmu.X[5])); + Assert.That(_context.GetX(6), Is.EqualTo(_unicornEmu.X[6])); + Assert.That(_context.GetX(7), Is.EqualTo(_unicornEmu.X[7])); + Assert.That(_context.GetX(8), Is.EqualTo(_unicornEmu.X[8])); + Assert.That(_context.GetX(9), Is.EqualTo(_unicornEmu.X[9])); + Assert.That(_context.GetX(10), Is.EqualTo(_unicornEmu.X[10])); + Assert.That(_context.GetX(11), Is.EqualTo(_unicornEmu.X[11])); + Assert.That(_context.GetX(12), Is.EqualTo(_unicornEmu.X[12])); + Assert.That(_context.GetX(13), Is.EqualTo(_unicornEmu.X[13])); + Assert.That(_context.GetX(14), Is.EqualTo(_unicornEmu.X[14])); + Assert.That(_context.GetX(15), Is.EqualTo(_unicornEmu.X[15])); + Assert.That(_context.GetX(16), Is.EqualTo(_unicornEmu.X[16])); + Assert.That(_context.GetX(17), Is.EqualTo(_unicornEmu.X[17])); + Assert.That(_context.GetX(18), Is.EqualTo(_unicornEmu.X[18])); + Assert.That(_context.GetX(19), Is.EqualTo(_unicornEmu.X[19])); + Assert.That(_context.GetX(20), Is.EqualTo(_unicornEmu.X[20])); + Assert.That(_context.GetX(21), Is.EqualTo(_unicornEmu.X[21])); + Assert.That(_context.GetX(22), Is.EqualTo(_unicornEmu.X[22])); + Assert.That(_context.GetX(23), Is.EqualTo(_unicornEmu.X[23])); + Assert.That(_context.GetX(24), Is.EqualTo(_unicornEmu.X[24])); + Assert.That(_context.GetX(25), Is.EqualTo(_unicornEmu.X[25])); + Assert.That(_context.GetX(26), Is.EqualTo(_unicornEmu.X[26])); + Assert.That(_context.GetX(27), Is.EqualTo(_unicornEmu.X[27])); + Assert.That(_context.GetX(28), Is.EqualTo(_unicornEmu.X[28])); + Assert.That(_context.GetX(29), Is.EqualTo(_unicornEmu.X[29])); + Assert.That(_context.GetX(30), Is.EqualTo(_unicornEmu.X[30])); + + Assert.That(_context.GetX(31), Is.EqualTo(_unicornEmu.SP)); if (fpTolerances == FpTolerances.None) { - Assert.That(_thread.ThreadState.V0, Is.EqualTo(_unicornEmu.Q[0])); + Assert.That(V128ToSimdValue(_context.GetV(0)), Is.EqualTo(_unicornEmu.Q[0])); } else { ManageFpTolerances(fpTolerances); } - Assert.That(_thread.ThreadState.V1, Is.EqualTo(_unicornEmu.Q[1])); - Assert.That(_thread.ThreadState.V2, Is.EqualTo(_unicornEmu.Q[2])); - Assert.That(_thread.ThreadState.V3, Is.EqualTo(_unicornEmu.Q[3])); - Assert.That(_thread.ThreadState.V4, Is.EqualTo(_unicornEmu.Q[4])); - Assert.That(_thread.ThreadState.V5, Is.EqualTo(_unicornEmu.Q[5])); - Assert.That(_thread.ThreadState.V6, Is.EqualTo(_unicornEmu.Q[6])); - Assert.That(_thread.ThreadState.V7, Is.EqualTo(_unicornEmu.Q[7])); - Assert.That(_thread.ThreadState.V8, Is.EqualTo(_unicornEmu.Q[8])); - Assert.That(_thread.ThreadState.V9, Is.EqualTo(_unicornEmu.Q[9])); - Assert.That(_thread.ThreadState.V10, Is.EqualTo(_unicornEmu.Q[10])); - Assert.That(_thread.ThreadState.V11, Is.EqualTo(_unicornEmu.Q[11])); - Assert.That(_thread.ThreadState.V12, Is.EqualTo(_unicornEmu.Q[12])); - Assert.That(_thread.ThreadState.V13, Is.EqualTo(_unicornEmu.Q[13])); - Assert.That(_thread.ThreadState.V14, Is.EqualTo(_unicornEmu.Q[14])); - Assert.That(_thread.ThreadState.V15, Is.EqualTo(_unicornEmu.Q[15])); - Assert.That(_thread.ThreadState.V16, Is.EqualTo(_unicornEmu.Q[16])); - Assert.That(_thread.ThreadState.V17, Is.EqualTo(_unicornEmu.Q[17])); - Assert.That(_thread.ThreadState.V18, Is.EqualTo(_unicornEmu.Q[18])); - Assert.That(_thread.ThreadState.V19, Is.EqualTo(_unicornEmu.Q[19])); - Assert.That(_thread.ThreadState.V20, Is.EqualTo(_unicornEmu.Q[20])); - Assert.That(_thread.ThreadState.V21, Is.EqualTo(_unicornEmu.Q[21])); - Assert.That(_thread.ThreadState.V22, Is.EqualTo(_unicornEmu.Q[22])); - Assert.That(_thread.ThreadState.V23, Is.EqualTo(_unicornEmu.Q[23])); - Assert.That(_thread.ThreadState.V24, Is.EqualTo(_unicornEmu.Q[24])); - Assert.That(_thread.ThreadState.V25, Is.EqualTo(_unicornEmu.Q[25])); - Assert.That(_thread.ThreadState.V26, Is.EqualTo(_unicornEmu.Q[26])); - Assert.That(_thread.ThreadState.V27, Is.EqualTo(_unicornEmu.Q[27])); - Assert.That(_thread.ThreadState.V28, Is.EqualTo(_unicornEmu.Q[28])); - Assert.That(_thread.ThreadState.V29, Is.EqualTo(_unicornEmu.Q[29])); - Assert.That(_thread.ThreadState.V30, Is.EqualTo(_unicornEmu.Q[30])); - Assert.That(_thread.ThreadState.V31, Is.EqualTo(_unicornEmu.Q[31])); - - Assert.That(_thread.ThreadState.Fpcr, Is.EqualTo(_unicornEmu.Fpcr)); - Assert.That(_thread.ThreadState.Fpsr & (int)fpsrMask, Is.EqualTo(_unicornEmu.Fpsr & (int)fpsrMask)); - - Assert.That(_thread.ThreadState.Overflow, Is.EqualTo(_unicornEmu.OverflowFlag)); - Assert.That(_thread.ThreadState.Carry, Is.EqualTo(_unicornEmu.CarryFlag)); - Assert.That(_thread.ThreadState.Zero, Is.EqualTo(_unicornEmu.ZeroFlag)); - Assert.That(_thread.ThreadState.Negative, Is.EqualTo(_unicornEmu.NegativeFlag)); + Assert.That(V128ToSimdValue(_context.GetV(1)), Is.EqualTo(_unicornEmu.Q[1])); + Assert.That(V128ToSimdValue(_context.GetV(2)), Is.EqualTo(_unicornEmu.Q[2])); + Assert.That(V128ToSimdValue(_context.GetV(3)), Is.EqualTo(_unicornEmu.Q[3])); + Assert.That(V128ToSimdValue(_context.GetV(4)), Is.EqualTo(_unicornEmu.Q[4])); + Assert.That(V128ToSimdValue(_context.GetV(5)), Is.EqualTo(_unicornEmu.Q[5])); + Assert.That(V128ToSimdValue(_context.GetV(6)), Is.EqualTo(_unicornEmu.Q[6])); + Assert.That(V128ToSimdValue(_context.GetV(7)), Is.EqualTo(_unicornEmu.Q[7])); + Assert.That(V128ToSimdValue(_context.GetV(8)), Is.EqualTo(_unicornEmu.Q[8])); + Assert.That(V128ToSimdValue(_context.GetV(9)), Is.EqualTo(_unicornEmu.Q[9])); + Assert.That(V128ToSimdValue(_context.GetV(10)), Is.EqualTo(_unicornEmu.Q[10])); + Assert.That(V128ToSimdValue(_context.GetV(11)), Is.EqualTo(_unicornEmu.Q[11])); + Assert.That(V128ToSimdValue(_context.GetV(12)), Is.EqualTo(_unicornEmu.Q[12])); + Assert.That(V128ToSimdValue(_context.GetV(13)), Is.EqualTo(_unicornEmu.Q[13])); + Assert.That(V128ToSimdValue(_context.GetV(14)), Is.EqualTo(_unicornEmu.Q[14])); + Assert.That(V128ToSimdValue(_context.GetV(15)), Is.EqualTo(_unicornEmu.Q[15])); + Assert.That(V128ToSimdValue(_context.GetV(16)), Is.EqualTo(_unicornEmu.Q[16])); + Assert.That(V128ToSimdValue(_context.GetV(17)), Is.EqualTo(_unicornEmu.Q[17])); + Assert.That(V128ToSimdValue(_context.GetV(18)), Is.EqualTo(_unicornEmu.Q[18])); + Assert.That(V128ToSimdValue(_context.GetV(19)), Is.EqualTo(_unicornEmu.Q[19])); + Assert.That(V128ToSimdValue(_context.GetV(20)), Is.EqualTo(_unicornEmu.Q[20])); + Assert.That(V128ToSimdValue(_context.GetV(21)), Is.EqualTo(_unicornEmu.Q[21])); + Assert.That(V128ToSimdValue(_context.GetV(22)), Is.EqualTo(_unicornEmu.Q[22])); + Assert.That(V128ToSimdValue(_context.GetV(23)), Is.EqualTo(_unicornEmu.Q[23])); + Assert.That(V128ToSimdValue(_context.GetV(24)), Is.EqualTo(_unicornEmu.Q[24])); + Assert.That(V128ToSimdValue(_context.GetV(25)), Is.EqualTo(_unicornEmu.Q[25])); + Assert.That(V128ToSimdValue(_context.GetV(26)), Is.EqualTo(_unicornEmu.Q[26])); + Assert.That(V128ToSimdValue(_context.GetV(27)), Is.EqualTo(_unicornEmu.Q[27])); + Assert.That(V128ToSimdValue(_context.GetV(28)), Is.EqualTo(_unicornEmu.Q[28])); + Assert.That(V128ToSimdValue(_context.GetV(29)), Is.EqualTo(_unicornEmu.Q[29])); + Assert.That(V128ToSimdValue(_context.GetV(30)), Is.EqualTo(_unicornEmu.Q[30])); + Assert.That(V128ToSimdValue(_context.GetV(31)), Is.EqualTo(_unicornEmu.Q[31])); + + Assert.That((int)_context.Fpcr, Is.EqualTo(_unicornEmu.Fpcr)); + Assert.That((int)_context.Fpsr & (int)fpsrMask, Is.EqualTo(_unicornEmu.Fpsr & (int)fpsrMask)); + + Assert.That(_context.GetPstateFlag(PState.VFlag), Is.EqualTo(_unicornEmu.OverflowFlag)); + Assert.That(_context.GetPstateFlag(PState.CFlag), Is.EqualTo(_unicornEmu.CarryFlag)); + Assert.That(_context.GetPstateFlag(PState.ZFlag), Is.EqualTo(_unicornEmu.ZeroFlag)); + Assert.That(_context.GetPstateFlag(PState.NFlag), Is.EqualTo(_unicornEmu.NegativeFlag)); } private void ManageFpSkips(FpSkips fpSkips) { if (fpSkips.HasFlag(FpSkips.IfNaNS)) { - if (float.IsNaN(VectorExtractSingle(_unicornEmu.Q[0], (byte)0))) + if (float.IsNaN(_unicornEmu.Q[0].AsFloat())) { Assert.Ignore("NaN test."); } } else if (fpSkips.HasFlag(FpSkips.IfNaND)) { - if (double.IsNaN(VectorExtractDouble(_unicornEmu.Q[0], (byte)0))) + if (double.IsNaN(_unicornEmu.Q[0].AsDouble())) { Assert.Ignore("NaN test."); } @@ -398,158 +406,68 @@ namespace Ryujinx.Tests.Cpu private void ManageFpTolerances(FpTolerances fpTolerances) { - if (!Is.EqualTo(_unicornEmu.Q[0]).ApplyTo(_thread.ThreadState.V0).IsSuccess) + bool IsNormalOrSubnormalS(float f) => float.IsNormal(f) || float.IsSubnormal(f); + bool IsNormalOrSubnormalD(double d) => double.IsNormal(d) || double.IsSubnormal(d); + + if (!Is.EqualTo(_unicornEmu.Q[0]).ApplyTo(V128ToSimdValue(_context.GetV(0))).IsSuccess) { if (fpTolerances == FpTolerances.UpToOneUlpsS) { - if (IsNormalOrSubnormalS(VectorExtractSingle(_unicornEmu.Q[0], (byte)0)) && - IsNormalOrSubnormalS(VectorExtractSingle(_thread.ThreadState.V0, (byte)0))) + if (IsNormalOrSubnormalS(_unicornEmu.Q[0].AsFloat()) && + IsNormalOrSubnormalS(_context.GetV(0).AsFloat())) { - Assert.That (VectorExtractSingle(_thread.ThreadState.V0, (byte)0), - Is.EqualTo(VectorExtractSingle(_unicornEmu.Q[0], (byte)0)).Within(1).Ulps); - Assert.That (VectorExtractSingle(_thread.ThreadState.V0, (byte)1), - Is.EqualTo(VectorExtractSingle(_unicornEmu.Q[0], (byte)1)).Within(1).Ulps); - Assert.That (VectorExtractSingle(_thread.ThreadState.V0, (byte)2), - Is.EqualTo(VectorExtractSingle(_unicornEmu.Q[0], (byte)2)).Within(1).Ulps); - Assert.That (VectorExtractSingle(_thread.ThreadState.V0, (byte)3), - Is.EqualTo(VectorExtractSingle(_unicornEmu.Q[0], (byte)3)).Within(1).Ulps); + Assert.That (_context.GetV(0).GetFloat(0), + Is.EqualTo(_unicornEmu.Q[0].GetFloat(0)).Within(1).Ulps); + Assert.That (_context.GetV(0).GetFloat(1), + Is.EqualTo(_unicornEmu.Q[0].GetFloat(1)).Within(1).Ulps); + Assert.That (_context.GetV(0).GetFloat(2), + Is.EqualTo(_unicornEmu.Q[0].GetFloat(2)).Within(1).Ulps); + Assert.That (_context.GetV(0).GetFloat(3), + Is.EqualTo(_unicornEmu.Q[0].GetFloat(3)).Within(1).Ulps); Console.WriteLine(fpTolerances); } else { - Assert.That(_thread.ThreadState.V0, Is.EqualTo(_unicornEmu.Q[0])); + Assert.That(V128ToSimdValue(_context.GetV(0)), Is.EqualTo(_unicornEmu.Q[0])); } } if (fpTolerances == FpTolerances.UpToOneUlpsD) { - if (IsNormalOrSubnormalD(VectorExtractDouble(_unicornEmu.Q[0], (byte)0)) && - IsNormalOrSubnormalD(VectorExtractDouble(_thread.ThreadState.V0, (byte)0))) + if (IsNormalOrSubnormalD(_unicornEmu.Q[0].AsDouble()) && + IsNormalOrSubnormalD(_context.GetV(0).AsDouble())) { - Assert.That (VectorExtractDouble(_thread.ThreadState.V0, (byte)0), - Is.EqualTo(VectorExtractDouble(_unicornEmu.Q[0], (byte)0)).Within(1).Ulps); - Assert.That (VectorExtractDouble(_thread.ThreadState.V0, (byte)1), - Is.EqualTo(VectorExtractDouble(_unicornEmu.Q[0], (byte)1)).Within(1).Ulps); + Assert.That (_context.GetV(0).GetDouble(0), + Is.EqualTo(_unicornEmu.Q[0].GetDouble(0)).Within(1).Ulps); + Assert.That (_context.GetV(0).GetDouble(1), + Is.EqualTo(_unicornEmu.Q[0].GetDouble(1)).Within(1).Ulps); Console.WriteLine(fpTolerances); } else { - Assert.That(_thread.ThreadState.V0, Is.EqualTo(_unicornEmu.Q[0])); + Assert.That(V128ToSimdValue(_context.GetV(0)), Is.EqualTo(_unicornEmu.Q[0])); } } } - - bool IsNormalOrSubnormalS(float f) => float.IsNormal(f) || float.IsSubnormal(f); - - bool IsNormalOrSubnormalD(double d) => double.IsNormal(d) || double.IsSubnormal(d); - } - - protected static Vector128<float> MakeVectorE0(double e0) - { - if (!Sse2.IsSupported) - { - throw new PlatformNotSupportedException(); - } - - return Sse.StaticCast<long, float>(Sse2.SetVector128(0, BitConverter.DoubleToInt64Bits(e0))); - } - - protected static Vector128<float> MakeVectorE0E1(double e0, double e1) - { - if (!Sse2.IsSupported) - { - throw new PlatformNotSupportedException(); - } - - return Sse.StaticCast<long, float>( - Sse2.SetVector128(BitConverter.DoubleToInt64Bits(e1), BitConverter.DoubleToInt64Bits(e0))); - } - - protected static Vector128<float> MakeVectorE1(double e1) - { - if (!Sse2.IsSupported) - { - throw new PlatformNotSupportedException(); - } - - return Sse.StaticCast<long, float>(Sse2.SetVector128(BitConverter.DoubleToInt64Bits(e1), 0)); - } - - protected static float VectorExtractSingle(Vector128<float> vector, byte index) - { - if (!Sse41.IsSupported) - { - throw new PlatformNotSupportedException(); - } - - int value = Sse41.Extract(Sse.StaticCast<float, int>(vector), index); - - return BitConverter.Int32BitsToSingle(value); - } - - protected static double VectorExtractDouble(Vector128<float> vector, byte index) - { - if (!Sse41.IsSupported) - { - throw new PlatformNotSupportedException(); - } - - long value = Sse41.Extract(Sse.StaticCast<float, long>(vector), index); - - return BitConverter.Int64BitsToDouble(value); - } - - protected static Vector128<float> MakeVectorE0(ulong e0) - { - if (!Sse2.IsSupported) - { - throw new PlatformNotSupportedException(); - } - - return Sse.StaticCast<ulong, float>(Sse2.SetVector128(0, e0)); - } - - protected static Vector128<float> MakeVectorE0E1(ulong e0, ulong e1) - { - if (!Sse2.IsSupported) - { - throw new PlatformNotSupportedException(); - } - - return Sse.StaticCast<ulong, float>(Sse2.SetVector128(e1, e0)); } - protected static Vector128<float> MakeVectorE1(ulong e1) + private static SimdValue V128ToSimdValue(V128 value) { - if (!Sse2.IsSupported) - { - throw new PlatformNotSupportedException(); - } - - return Sse.StaticCast<ulong, float>(Sse2.SetVector128(e1, 0)); + return new SimdValue(value.GetUInt64(0), value.GetUInt64(1)); } - protected static ulong GetVectorE0(Vector128<float> vector) - { - if (!Sse41.IsSupported) - { - throw new PlatformNotSupportedException(); - } + protected static V128 MakeVectorScalar(float value) => new V128(value); + protected static V128 MakeVectorScalar(double value) => new V128(value); - return Sse41.Extract(Sse.StaticCast<float, ulong>(vector), (byte)0); - } + protected static V128 MakeVectorE0(ulong e0) => new V128(e0, 0); + protected static V128 MakeVectorE1(ulong e1) => new V128(0, e1); - protected static ulong GetVectorE1(Vector128<float> vector) - { - if (!Sse41.IsSupported) - { - throw new PlatformNotSupportedException(); - } + protected static V128 MakeVectorE0E1(ulong e0, ulong e1) => new V128(e0, e1); - return Sse41.Extract(Sse.StaticCast<float, ulong>(vector), (byte)1); - } + protected static ulong GetVectorE0(V128 vector) => vector.GetUInt64(0); + protected static ulong GetVectorE1(V128 vector) => vector.GetUInt64(1); protected static ushort GenNormalH() { diff --git a/Ryujinx.Tests/Cpu/CpuTestAluBinary.cs b/Ryujinx.Tests/Cpu/CpuTestAluBinary.cs new file mode 100644 index 00000000..2823477f --- /dev/null +++ b/Ryujinx.Tests/Cpu/CpuTestAluBinary.cs @@ -0,0 +1,238 @@ +#define AluBinary + +using NUnit.Framework; + +namespace Ryujinx.Tests.Cpu +{ + [Category("AluBinary")] + public sealed class CpuTestAluBinary : CpuTest + { +#if AluBinary + private const int RndCnt = 2; + + [Test, Pairwise, Description("CRC32X <Wd>, <Wn>, <Xm>"), Ignore("Unicorn fails.")] + public void Crc32x([Values(0u, 31u)] uint rd, + [Values(1u, 31u)] uint rn, + [Values(2u, 31u)] uint rm, + [Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, + [Values((ulong)0x00_00_00_00_00_00_00_00, + (ulong)0x7F_FF_FF_FF_FF_FF_FF_FF, + (ulong)0x80_00_00_00_00_00_00_00, + (ulong)0xFF_FF_FF_FF_FF_FF_FF_FF)] [Random(RndCnt)] ulong xm) + { + uint opcode = 0x9AC04C00; // CRC32X W0, W0, X0 + opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); + + uint w31 = TestContext.CurrentContext.Random.NextUInt(); + + SingleOpcode(opcode, x1: wn, x2: xm, x31: w31); + + CompareAgainstUnicorn(); + } + + [Test, Pairwise, Description("CRC32W <Wd>, <Wn>, <Wm>"), Ignore("Unicorn fails.")] + public void Crc32w([Values(0u, 31u)] uint rd, + [Values(1u, 31u)] uint rn, + [Values(2u, 31u)] uint rm, + [Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, + [Values((uint)0x00_00_00_00, (uint)0x7F_FF_FF_FF, + (uint)0x80_00_00_00, (uint)0xFF_FF_FF_FF)] [Random(RndCnt)] uint wm) + { + uint opcode = 0x1AC04800; // CRC32W W0, W0, W0 + opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); + + uint w31 = TestContext.CurrentContext.Random.NextUInt(); + + SingleOpcode(opcode, x1: wn, x2: wm, x31: w31); + + CompareAgainstUnicorn(); + } + + [Test, Pairwise, Description("CRC32H <Wd>, <Wn>, <Wm>"), Ignore("Unicorn fails.")] + public void Crc32h([Values(0u, 31u)] uint rd, + [Values(1u, 31u)] uint rn, + [Values(2u, 31u)] uint rm, + [Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, + [Values((ushort)0x00_00, (ushort)0x7F_FF, + (ushort)0x80_00, (ushort)0xFF_FF)] [Random(RndCnt)] ushort wm) + { + uint opcode = 0x1AC04400; // CRC32H W0, W0, W0 + opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); + + uint w31 = TestContext.CurrentContext.Random.NextUInt(); + + SingleOpcode(opcode, x1: wn, x2: wm, x31: w31); + + CompareAgainstUnicorn(); + } + + [Test, Pairwise, Description("CRC32B <Wd>, <Wn>, <Wm>"), Ignore("Unicorn fails.")] + public void Crc32b([Values(0u, 31u)] uint rd, + [Values(1u, 31u)] uint rn, + [Values(2u, 31u)] uint rm, + [Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, + [Values((byte)0x00, (byte)0x7F, + (byte)0x80, (byte)0xFF)] [Random(RndCnt)] byte wm) + { + uint opcode = 0x1AC04000; // CRC32B W0, W0, W0 + opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); + + uint w31 = TestContext.CurrentContext.Random.NextUInt(); + + SingleOpcode(opcode, x1: wn, x2: wm, x31: w31); + + CompareAgainstUnicorn(); + } + + [Test, Pairwise, Description("CRC32CX <Wd>, <Wn>, <Xm>")] + public void Crc32cx([Values(0u, 31u)] uint rd, + [Values(1u, 31u)] uint rn, + [Values(2u, 31u)] uint rm, + [Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, + [Values((ulong)0x00_00_00_00_00_00_00_00, + (ulong)0x7F_FF_FF_FF_FF_FF_FF_FF, + (ulong)0x80_00_00_00_00_00_00_00, + (ulong)0xFF_FF_FF_FF_FF_FF_FF_FF)] [Random(RndCnt)] ulong xm) + { + uint opcode = 0x9AC05C00; // CRC32CX W0, W0, X0 + opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); + + uint w31 = TestContext.CurrentContext.Random.NextUInt(); + + SingleOpcode(opcode, x1: wn, x2: xm, x31: w31); + + CompareAgainstUnicorn(); + } + + [Test, Pairwise, Description("CRC32CW <Wd>, <Wn>, <Wm>")] + public void Crc32cw([Values(0u, 31u)] uint rd, + [Values(1u, 31u)] uint rn, + [Values(2u, 31u)] uint rm, + [Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, + [Values((uint)0x00_00_00_00, (uint)0x7F_FF_FF_FF, + (uint)0x80_00_00_00, (uint)0xFF_FF_FF_FF)] [Random(RndCnt)] uint wm) + { + uint opcode = 0x1AC05800; // CRC32CW W0, W0, W0 + opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); + + uint w31 = TestContext.CurrentContext.Random.NextUInt(); + + SingleOpcode(opcode, x1: wn, x2: wm, x31: w31); + + CompareAgainstUnicorn(); + } + + [Test, Pairwise, Description("CRC32CH <Wd>, <Wn>, <Wm>")] + public void Crc32ch([Values(0u, 31u)] uint rd, + [Values(1u, 31u)] uint rn, + [Values(2u, 31u)] uint rm, + [Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, + [Values((ushort)0x00_00, (ushort)0x7F_FF, + (ushort)0x80_00, (ushort)0xFF_FF)] [Random(RndCnt)] ushort wm) + { + uint opcode = 0x1AC05400; // CRC32CH W0, W0, W0 + opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); + + uint w31 = TestContext.CurrentContext.Random.NextUInt(); + + SingleOpcode(opcode, x1: wn, x2: wm, x31: w31); + + CompareAgainstUnicorn(); + } + + [Test, Pairwise, Description("CRC32CB <Wd>, <Wn>, <Wm>")] + public void Crc32cb([Values(0u, 31u)] uint rd, + [Values(1u, 31u)] uint rn, + [Values(2u, 31u)] uint rm, + [Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, + [Values((byte)0x00, (byte)0x7F, + (byte)0x80, (byte)0xFF)] [Random(RndCnt)] byte wm) + { + uint opcode = 0x1AC05000; // CRC32CB W0, W0, W0 + opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); + + uint w31 = TestContext.CurrentContext.Random.NextUInt(); + + SingleOpcode(opcode, x1: wn, x2: wm, x31: w31); + + CompareAgainstUnicorn(); + } + + [Test, Pairwise, Description("SDIV <Xd>, <Xn>, <Xm>")] + public void Sdiv_64bit([Values(0u, 31u)] uint rd, + [Values(1u, 31u)] uint rn, + [Values(2u, 31u)] uint rm, + [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul, + 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn, + [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul, + 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm) + { + uint opcode = 0x9AC00C00; // SDIV X0, X0, X0 + opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); + + ulong x31 = TestContext.CurrentContext.Random.NextULong(); + + SingleOpcode(opcode, x1: xn, x2: xm, x31: x31); + + CompareAgainstUnicorn(); + } + + [Test, Pairwise, Description("SDIV <Wd>, <Wn>, <Wm>")] + public void Sdiv_32bit([Values(0u, 31u)] uint rd, + [Values(1u, 31u)] uint rn, + [Values(2u, 31u)] uint rm, + [Values(0x00000000u, 0x7FFFFFFFu, + 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, + [Values(0x00000000u, 0x7FFFFFFFu, + 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm) + { + uint opcode = 0x1AC00C00; // SDIV W0, W0, W0 + opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); + + uint w31 = TestContext.CurrentContext.Random.NextUInt(); + + SingleOpcode(opcode, x1: wn, x2: wm, x31: w31); + + CompareAgainstUnicorn(); + } + + [Test, Pairwise, Description("UDIV <Xd>, <Xn>, <Xm>")] + public void Udiv_64bit([Values(0u, 31u)] uint rd, + [Values(1u, 31u)] uint rn, + [Values(2u, 31u)] uint rm, + [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul, + 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn, + [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul, + 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm) + { + uint opcode = 0x9AC00800; // UDIV X0, X0, X0 + opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); + + ulong x31 = TestContext.CurrentContext.Random.NextULong(); + + SingleOpcode(opcode, x1: xn, x2: xm, x31: x31); + + CompareAgainstUnicorn(); + } + + [Test, Pairwise, Description("UDIV <Wd>, <Wn>, <Wm>")] + public void Udiv_32bit([Values(0u, 31u)] uint rd, + [Values(1u, 31u)] uint rn, + [Values(2u, 31u)] uint rm, + [Values(0x00000000u, 0x7FFFFFFFu, + 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, + [Values(0x00000000u, 0x7FFFFFFFu, + 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm) + { + uint opcode = 0x1AC00800; // UDIV W0, W0, W0 + opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); + + uint w31 = TestContext.CurrentContext.Random.NextUInt(); + + SingleOpcode(opcode, x1: wn, x2: wm, x31: w31); + + CompareAgainstUnicorn(); + } +#endif + } +} diff --git a/Ryujinx.Tests/Cpu/CpuTestAluRs.cs b/Ryujinx.Tests/Cpu/CpuTestAluRs.cs index 2d4013e2..418dd56d 100644 --- a/Ryujinx.Tests/Cpu/CpuTestAluRs.cs +++ b/Ryujinx.Tests/Cpu/CpuTestAluRs.cs @@ -394,154 +394,6 @@ namespace Ryujinx.Tests.Cpu CompareAgainstUnicorn(); } - [Test, Pairwise, Description("CRC32X <Wd>, <Wn>, <Xm>"), Ignore("Unicorn fails.")] - public void Crc32x([Values(0u, 31u)] uint rd, - [Values(1u, 31u)] uint rn, - [Values(2u, 31u)] uint rm, - [Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, - [Values((ulong)0x00_00_00_00_00_00_00_00, - (ulong)0x7F_FF_FF_FF_FF_FF_FF_FF, - (ulong)0x80_00_00_00_00_00_00_00, - (ulong)0xFF_FF_FF_FF_FF_FF_FF_FF)] [Random(RndCnt)] ulong xm) - { - uint opcode = 0x9AC04C00; // CRC32X W0, W0, X0 - opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - - uint w31 = TestContext.CurrentContext.Random.NextUInt(); - - SingleOpcode(opcode, x1: wn, x2: xm, x31: w31); - - CompareAgainstUnicorn(); - } - - [Test, Pairwise, Description("CRC32W <Wd>, <Wn>, <Wm>"), Ignore("Unicorn fails.")] - public void Crc32w([Values(0u, 31u)] uint rd, - [Values(1u, 31u)] uint rn, - [Values(2u, 31u)] uint rm, - [Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, - [Values((uint)0x00_00_00_00, (uint)0x7F_FF_FF_FF, - (uint)0x80_00_00_00, (uint)0xFF_FF_FF_FF)] [Random(RndCnt)] uint wm) - { - uint opcode = 0x1AC04800; // CRC32W W0, W0, W0 - opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - - uint w31 = TestContext.CurrentContext.Random.NextUInt(); - - SingleOpcode(opcode, x1: wn, x2: wm, x31: w31); - - CompareAgainstUnicorn(); - } - - [Test, Pairwise, Description("CRC32H <Wd>, <Wn>, <Wm>"), Ignore("Unicorn fails.")] - public void Crc32h([Values(0u, 31u)] uint rd, - [Values(1u, 31u)] uint rn, - [Values(2u, 31u)] uint rm, - [Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, - [Values((ushort)0x00_00, (ushort)0x7F_FF, - (ushort)0x80_00, (ushort)0xFF_FF)] [Random(RndCnt)] ushort wm) - { - uint opcode = 0x1AC04400; // CRC32H W0, W0, W0 - opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - - uint w31 = TestContext.CurrentContext.Random.NextUInt(); - - SingleOpcode(opcode, x1: wn, x2: wm, x31: w31); - - CompareAgainstUnicorn(); - } - - [Test, Pairwise, Description("CRC32B <Wd>, <Wn>, <Wm>"), Ignore("Unicorn fails.")] - public void Crc32b([Values(0u, 31u)] uint rd, - [Values(1u, 31u)] uint rn, - [Values(2u, 31u)] uint rm, - [Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, - [Values((byte)0x00, (byte)0x7F, - (byte)0x80, (byte)0xFF)] [Random(RndCnt)] byte wm) - { - uint opcode = 0x1AC04000; // CRC32B W0, W0, W0 - opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - - uint w31 = TestContext.CurrentContext.Random.NextUInt(); - - SingleOpcode(opcode, x1: wn, x2: wm, x31: w31); - - CompareAgainstUnicorn(); - } - - [Test, Pairwise, Description("CRC32CX <Wd>, <Wn>, <Xm>")] - public void Crc32cx([Values(0u, 31u)] uint rd, - [Values(1u, 31u)] uint rn, - [Values(2u, 31u)] uint rm, - [Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, - [Values((ulong)0x00_00_00_00_00_00_00_00, - (ulong)0x7F_FF_FF_FF_FF_FF_FF_FF, - (ulong)0x80_00_00_00_00_00_00_00, - (ulong)0xFF_FF_FF_FF_FF_FF_FF_FF)] [Random(RndCnt)] ulong xm) - { - uint opcode = 0x9AC05C00; // CRC32CX W0, W0, X0 - opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - - uint w31 = TestContext.CurrentContext.Random.NextUInt(); - - SingleOpcode(opcode, x1: wn, x2: xm, x31: w31); - - CompareAgainstUnicorn(); - } - - [Test, Pairwise, Description("CRC32CW <Wd>, <Wn>, <Wm>")] - public void Crc32cw([Values(0u, 31u)] uint rd, - [Values(1u, 31u)] uint rn, - [Values(2u, 31u)] uint rm, - [Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, - [Values((uint)0x00_00_00_00, (uint)0x7F_FF_FF_FF, - (uint)0x80_00_00_00, (uint)0xFF_FF_FF_FF)] [Random(RndCnt)] uint wm) - { - uint opcode = 0x1AC05800; // CRC32CW W0, W0, W0 - opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - - uint w31 = TestContext.CurrentContext.Random.NextUInt(); - - SingleOpcode(opcode, x1: wn, x2: wm, x31: w31); - - CompareAgainstUnicorn(); - } - - [Test, Pairwise, Description("CRC32CH <Wd>, <Wn>, <Wm>")] - public void Crc32ch([Values(0u, 31u)] uint rd, - [Values(1u, 31u)] uint rn, - [Values(2u, 31u)] uint rm, - [Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, - [Values((ushort)0x00_00, (ushort)0x7F_FF, - (ushort)0x80_00, (ushort)0xFF_FF)] [Random(RndCnt)] ushort wm) - { - uint opcode = 0x1AC05400; // CRC32CH W0, W0, W0 - opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - - uint w31 = TestContext.CurrentContext.Random.NextUInt(); - - SingleOpcode(opcode, x1: wn, x2: wm, x31: w31); - - CompareAgainstUnicorn(); - } - - [Test, Pairwise, Description("CRC32CB <Wd>, <Wn>, <Wm>")] - public void Crc32cb([Values(0u, 31u)] uint rd, - [Values(1u, 31u)] uint rn, - [Values(2u, 31u)] uint rm, - [Values(0x00000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, - [Values((byte)0x00, (byte)0x7F, - (byte)0x80, (byte)0xFF)] [Random(RndCnt)] byte wm) - { - uint opcode = 0x1AC05000; // CRC32CB W0, W0, W0 - opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - - uint w31 = TestContext.CurrentContext.Random.NextUInt(); - - SingleOpcode(opcode, x1: wn, x2: wm, x31: w31); - - CompareAgainstUnicorn(); - } - [Test, Pairwise, Description("EON <Xd>, <Xn>, <Xm>{, <shift> #<amount>}")] public void Eon_64bit([Values(0u, 31u)] uint rd, [Values(1u, 31u)] uint rn, @@ -954,44 +806,6 @@ namespace Ryujinx.Tests.Cpu CompareAgainstUnicorn(); } - [Test, Pairwise, Description("SDIV <Xd>, <Xn>, <Xm>")] - public void Sdiv_64bit([Values(0u, 31u)] uint rd, - [Values(1u, 31u)] uint rn, - [Values(2u, 31u)] uint rm, - [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul, - 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn, - [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul, - 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm) - { - uint opcode = 0x9AC00C00; // SDIV X0, X0, X0 - opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - - ulong x31 = TestContext.CurrentContext.Random.NextULong(); - - SingleOpcode(opcode, x1: xn, x2: xm, x31: x31); - - CompareAgainstUnicorn(); - } - - [Test, Pairwise, Description("SDIV <Wd>, <Wn>, <Wm>")] - public void Sdiv_32bit([Values(0u, 31u)] uint rd, - [Values(1u, 31u)] uint rn, - [Values(2u, 31u)] uint rm, - [Values(0x00000000u, 0x7FFFFFFFu, - 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, - [Values(0x00000000u, 0x7FFFFFFFu, - 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm) - { - uint opcode = 0x1AC00C00; // SDIV W0, W0, W0 - opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - - uint w31 = TestContext.CurrentContext.Random.NextUInt(); - - SingleOpcode(opcode, x1: wn, x2: wm, x31: w31); - - CompareAgainstUnicorn(); - } - [Test, Pairwise, Description("SUB <Xd>, <Xn>, <Xm>{, <shift> #<amount>}")] public void Sub_64bit([Values(0u, 31u)] uint rd, [Values(1u, 31u)] uint rn, @@ -1079,44 +893,6 @@ namespace Ryujinx.Tests.Cpu CompareAgainstUnicorn(); } - - [Test, Pairwise, Description("UDIV <Xd>, <Xn>, <Xm>")] - public void Udiv_64bit([Values(0u, 31u)] uint rd, - [Values(1u, 31u)] uint rn, - [Values(2u, 31u)] uint rm, - [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul, - 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xn, - [Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul, - 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong xm) - { - uint opcode = 0x9AC00800; // UDIV X0, X0, X0 - opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - - ulong x31 = TestContext.CurrentContext.Random.NextULong(); - - SingleOpcode(opcode, x1: xn, x2: xm, x31: x31); - - CompareAgainstUnicorn(); - } - - [Test, Pairwise, Description("UDIV <Wd>, <Wn>, <Wm>")] - public void Udiv_32bit([Values(0u, 31u)] uint rd, - [Values(1u, 31u)] uint rn, - [Values(2u, 31u)] uint rm, - [Values(0x00000000u, 0x7FFFFFFFu, - 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wn, - [Values(0x00000000u, 0x7FFFFFFFu, - 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint wm) - { - uint opcode = 0x1AC00800; // UDIV W0, W0, W0 - opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - - uint w31 = TestContext.CurrentContext.Random.NextUInt(); - - SingleOpcode(opcode, x1: wn, x2: wm, x31: w31); - - CompareAgainstUnicorn(); - } #endif } } diff --git a/Ryujinx.Tests/Cpu/CpuTestMisc.cs b/Ryujinx.Tests/Cpu/CpuTestMisc.cs index e976c2c0..6d2440c1 100644 --- a/Ryujinx.Tests/Cpu/CpuTestMisc.cs +++ b/Ryujinx.Tests/Cpu/CpuTestMisc.cs @@ -1,11 +1,9 @@ #define Misc -using ChocolArm64.State; +using ARMeilleure.State; using NUnit.Framework; -using System.Runtime.Intrinsics.X86; - namespace Ryujinx.Tests.Cpu { [Category("Misc")] @@ -32,10 +30,9 @@ namespace Ryujinx.Tests.Cpu opCmn |= ((shift & 3) << 22) | ((imm & 4095) << 10); opCset |= ((cond & 15) << 12); - SetThreadState(x0: xn); + SetContext(x0: xn); Opcode(opCmn); Opcode(opCset); - Opcode(0xD4200000); // BRK #0 Opcode(0xD65F03C0); // RET ExecuteOpcodes(); @@ -58,10 +55,9 @@ namespace Ryujinx.Tests.Cpu opCmn |= ((shift & 3) << 22) | ((imm & 4095) << 10); opCset |= ((cond & 15) << 12); - SetThreadState(x0: wn); + SetContext(x0: wn); Opcode(opCmn); Opcode(opCset); - Opcode(0xD4200000); // BRK #0 Opcode(0xD65F03C0); // RET ExecuteOpcodes(); @@ -84,10 +80,9 @@ namespace Ryujinx.Tests.Cpu opCmp |= ((shift & 3) << 22) | ((imm & 4095) << 10); opCset |= ((cond & 15) << 12); - SetThreadState(x0: xn); + SetContext(x0: xn); Opcode(opCmp); Opcode(opCset); - Opcode(0xD4200000); // BRK #0 Opcode(0xD65F03C0); // RET ExecuteOpcodes(); @@ -110,10 +105,9 @@ namespace Ryujinx.Tests.Cpu opCmp |= ((shift & 3) << 22) | ((imm & 4095) << 10); opCset |= ((cond & 15) << 12); - SetThreadState(x0: wn); + SetContext(x0: wn); Opcode(opCmp); Opcode(opCset); - Opcode(0xD4200000); // BRK #0 Opcode(0xD65F03C0); // RET ExecuteOpcodes(); @@ -136,11 +130,10 @@ namespace Ryujinx.Tests.Cpu SUB W0, W0, #3 MUL W0, W1, W0 SDIV W0, W2, W0 - BRK #0 RET */ - SetThreadState(x0: a); + SetContext(x0: a); Opcode(0x11000C02); Opcode(0x51001401); Opcode(0x1B017C42); @@ -148,11 +141,10 @@ namespace Ryujinx.Tests.Cpu Opcode(0x51000C00); Opcode(0x1B007C20); Opcode(0x1AC00C40); - Opcode(0xD4200000); Opcode(0xD65F03C0); ExecuteOpcodes(); - Assert.That(GetThreadState().X0, Is.Zero); + Assert.That(GetContext().GetX(0), Is.Zero); } [Explicit] @@ -185,24 +177,20 @@ namespace Ryujinx.Tests.Cpu FADD S0, S0, S1 FDIV S0, S2, S0 FMUL S0, S0, S0 - BRK #0 RET */ - SetThreadState( - v0: Sse.SetScalarVector128(a), - v1: Sse.SetScalarVector128(b)); + SetContext(v0: MakeVectorScalar(a), v1: MakeVectorScalar(b)); Opcode(0x1E2E1002); Opcode(0x1E201840); Opcode(0x1E211841); Opcode(0x1E212800); Opcode(0x1E201840); Opcode(0x1E200800); - Opcode(0xD4200000); Opcode(0xD65F03C0); ExecuteOpcodes(); - Assert.That(Sse41.Extract(GetThreadState().V0, (byte)0), Is.EqualTo(16f)); + Assert.That(GetContext().GetV(0).AsFloat(), Is.EqualTo(16f)); } [Explicit] @@ -235,24 +223,20 @@ namespace Ryujinx.Tests.Cpu FADD D0, D0, D1 FDIV D0, D2, D0 FMUL D0, D0, D0 - BRK #0 RET */ - SetThreadState( - v0: Sse.StaticCast<double, float>(Sse2.SetScalarVector128(a)), - v1: Sse.StaticCast<double, float>(Sse2.SetScalarVector128(b))); + SetContext(v0: MakeVectorScalar(a), v1: MakeVectorScalar(b)); Opcode(0x1E6E1002); Opcode(0x1E601840); Opcode(0x1E611841); Opcode(0x1E612800); Opcode(0x1E601840); Opcode(0x1E600800); - Opcode(0xD4200000); Opcode(0xD65F03C0); ExecuteOpcodes(); - Assert.That(VectorExtractDouble(GetThreadState().V0, (byte)0), Is.EqualTo(16d)); + Assert.That(GetContext().GetV(0).AsDouble(), Is.EqualTo(16d)); } [Test, Ignore("The Tester supports only one return point.")] @@ -279,9 +263,9 @@ namespace Ryujinx.Tests.Cpu /* 0x0000000000001000: MOV W4, W0 - 0x0000000000001004: CBZ W0, #0x3C + 0x0000000000001004: CBZ W0, #0x34 0x0000000000001008: CMP W0, #1 - 0x000000000000100C: B.LS #0x48 + 0x000000000000100C: B.LS #0x34 0x0000000000001010: MOVZ W2, #0x2 0x0000000000001014: MOVZ X1, #0x1 0x0000000000001018: MOVZ X3, #0 @@ -290,22 +274,19 @@ namespace Ryujinx.Tests.Cpu 0x0000000000001024: MOV X3, X1 0x0000000000001028: MOV X1, X0 0x000000000000102C: CMP W4, W2 - 0x0000000000001030: B.HS #0x1C - 0x0000000000001034: BRK #0 - 0x0000000000001038: RET - 0x000000000000103C: MOVZ X0, #0 - 0x0000000000001040: BRK #0 + 0x0000000000001030: B.HS #-0x14 + 0x0000000000001034: RET + 0x0000000000001038: MOVZ X0, #0 + 0x000000000000103C: RET + 0x0000000000001040: MOVZ X0, #0x1 0x0000000000001044: RET - 0x0000000000001048: MOVZ X0, #0x1 - 0x000000000000104C: BRK #0 - 0x0000000000001050: RET */ - SetThreadState(x0: a); + SetContext(x0: a); Opcode(0x2A0003E4); - Opcode(0x340001C0); + Opcode(0x340001A0); Opcode(0x7100041F); - Opcode(0x540001E9); + Opcode(0x540001A9); Opcode(0x52800042); Opcode(0xD2800021); Opcode(0xD2800003); @@ -315,17 +296,14 @@ namespace Ryujinx.Tests.Cpu Opcode(0xAA0003E1); Opcode(0x6B02009F); Opcode(0x54FFFF62); - Opcode(0xD4200000); Opcode(0xD65F03C0); Opcode(0xD2800000); - Opcode(0xD4200000); Opcode(0xD65F03C0); Opcode(0xD2800020); - Opcode(0xD4200000); Opcode(0xD65F03C0); ExecuteOpcodes(); - Assert.That(GetThreadState().X0, Is.EqualTo(Fn(a))); + Assert.That(GetContext().GetX(0), Is.EqualTo(Fn(a))); } [Explicit] @@ -338,18 +316,16 @@ namespace Ryujinx.Tests.Cpu 0x0000000000001000: MOV X0, #2 0x0000000000001004: MOV X1, #3 0x0000000000001008: ADD X0, X0, X1 - 0x000000000000100C: BRK #0 - 0x0000000000001010: RET + 0x000000000000100C: RET */ Opcode(0xD2800040); Opcode(0xD2800061); Opcode(0x8B010000); - Opcode(0xD4200000); Opcode(0xD65F03C0); ExecuteOpcodes(); - Assert.That(GetThreadState().X0, Is.EqualTo(result)); + Assert.That(GetContext().GetX(0), Is.EqualTo(result)); Reset(); @@ -357,18 +333,16 @@ namespace Ryujinx.Tests.Cpu 0x0000000000001000: MOV X0, #3 0x0000000000001004: MOV X1, #2 0x0000000000001008: ADD X0, X0, X1 - 0x000000000000100C: BRK #0 - 0x0000000000001010: RET + 0x000000000000100C: RET */ Opcode(0xD2800060); Opcode(0xD2800041); Opcode(0x8B010000); - Opcode(0xD4200000); Opcode(0xD65F03C0); ExecuteOpcodes(); - Assert.That(GetThreadState().X0, Is.EqualTo(result)); + Assert.That(GetContext().GetX(0), Is.EqualTo(result)); } [Explicit] @@ -379,9 +353,9 @@ namespace Ryujinx.Tests.Cpu public void SanityCheck(ulong a) { uint opcode = 0xD503201F; // NOP - CpuThreadState threadState = SingleOpcode(opcode, x0: a); + ExecutionContext context = SingleOpcode(opcode, x0: a); - Assert.That(threadState.X0, Is.EqualTo(a)); + Assert.That(context.GetX(0), Is.EqualTo(a)); } #endif } diff --git a/Ryujinx.Tests/Cpu/CpuTestSimd.cs b/Ryujinx.Tests/Cpu/CpuTestSimd.cs index b446d953..30dec59a 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimd.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimd.cs @@ -1,10 +1,11 @@ #define Simd +using ARMeilleure.State; + using NUnit.Framework; using System; using System.Collections.Generic; -using System.Runtime.Intrinsics; namespace Ryujinx.Tests.Cpu { @@ -1175,8 +1176,8 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x5EE0B800; // ABS D0, D0 opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1194,8 +1195,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1213,8 +1214,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1230,8 +1231,8 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x5EF1B800; // ADDP D0, V0.2D opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1249,8 +1250,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -1268,8 +1269,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -1287,8 +1288,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1306,8 +1307,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1325,8 +1326,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1344,8 +1345,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1363,8 +1364,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1382,8 +1383,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1399,8 +1400,8 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x5EE09800; // CMEQ D0, D0, #0 opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1418,8 +1419,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1437,8 +1438,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1454,8 +1455,8 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x7EE08800; // CMGE D0, D0, #0 opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1473,8 +1474,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1492,8 +1493,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1509,8 +1510,8 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x5EE08800; // CMGT D0, D0, #0 opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1528,8 +1529,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1547,8 +1548,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1564,8 +1565,8 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x7EE09800; // CMLE D0, D0, #0 opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1583,8 +1584,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1602,8 +1603,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1619,8 +1620,8 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x5EE0A800; // CMLT D0, D0, #0 opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1638,8 +1639,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1657,8 +1658,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1674,8 +1675,8 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x0E205800; // CNT V0.8B, V0.8B opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1691,8 +1692,8 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x4E205800; // CNT V0.16B, V0.16B opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -1704,8 +1705,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1S_F_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1722,8 +1723,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1D_F_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1746,8 +1747,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1768,8 +1769,8 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1786,8 +1787,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_2S_F_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1804,8 +1805,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1D_F_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0E1(a, a); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1822,8 +1823,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1S_F_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1839,8 +1840,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1D_F_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1862,8 +1863,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1883,8 +1884,8 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1899,7 +1900,7 @@ namespace Ryujinx.Tests.Cpu public void F_Cmp_Cmpe_S_S([ValueSource("_F_Cmp_Cmpe_S_S_")] uint opcodes, [ValueSource("_1S_F_")] ulong a) { - Vector128<float> v1 = MakeVectorE0(a); + V128 v1 = MakeVectorE0(a); bool v = TestContext.CurrentContext.Random.NextBool(); bool c = TestContext.CurrentContext.Random.NextBool(); @@ -1915,7 +1916,7 @@ namespace Ryujinx.Tests.Cpu public void F_Cmp_Cmpe_S_D([ValueSource("_F_Cmp_Cmpe_S_D_")] uint opcodes, [ValueSource("_1D_F_")] ulong a) { - Vector128<float> v1 = MakeVectorE0(a); + V128 v1 = MakeVectorE0(a); bool v = TestContext.CurrentContext.Random.NextBool(); bool c = TestContext.CurrentContext.Random.NextBool(); @@ -1932,8 +1933,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1S_F_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -1945,8 +1946,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1D_F_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -1958,8 +1959,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1S_F_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -1971,8 +1972,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1H_F_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -1984,8 +1985,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1S_F_W_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -1997,8 +1998,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1D_F_X_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2016,8 +2017,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2033,8 +2034,8 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2053,8 +2054,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -2079,8 +2080,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2099,8 +2100,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -2125,8 +2126,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2143,7 +2144,7 @@ namespace Ryujinx.Tests.Cpu ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32; uint w31 = TestContext.CurrentContext.Random.NextUInt(); - Vector128<float> v1 = MakeVectorE0(a); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, x0: x0, x31: w31, v1: v1); @@ -2159,7 +2160,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); ulong x31 = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v1 = MakeVectorE0(a); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, x31: x31, v1: v1); @@ -2175,7 +2176,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); ulong x31 = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v1 = MakeVectorE1(a); + V128 v1 = MakeVectorE1(a); SingleOpcode(opcodes, x31: x31, v1: v1); @@ -2192,7 +2193,7 @@ namespace Ryujinx.Tests.Cpu uint w31 = TestContext.CurrentContext.Random.NextUInt(); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); + V128 v0 = MakeVectorE0E1(z, z); SingleOpcode(opcodes, x1: wn, x31: w31, v0: v0); @@ -2209,7 +2210,7 @@ namespace Ryujinx.Tests.Cpu ulong x31 = TestContext.CurrentContext.Random.NextULong(); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); + V128 v0 = MakeVectorE1(z); SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0); @@ -2226,7 +2227,7 @@ namespace Ryujinx.Tests.Cpu ulong x31 = TestContext.CurrentContext.Random.NextULong(); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0(z); + V128 v0 = MakeVectorE0(z); SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0); @@ -2238,8 +2239,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1S_F_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2251,8 +2252,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1D_F_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2265,8 +2266,8 @@ namespace Ryujinx.Tests.Cpu [Values(RMode.Rn)] RMode rMode) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -2285,8 +2286,8 @@ namespace Ryujinx.Tests.Cpu [Values(RMode.Rn)] RMode rMode) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -2311,8 +2312,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -2335,8 +2336,8 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -2354,8 +2355,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1S_F_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2367,8 +2368,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1D_F_")] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2386,8 +2387,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2403,8 +2404,8 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2417,8 +2418,8 @@ namespace Ryujinx.Tests.Cpu [Values] RMode rMode) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); int fpcr = (int)rMode << (int)Fpcr.RMode; @@ -2433,8 +2434,8 @@ namespace Ryujinx.Tests.Cpu [Values] RMode rMode) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); int fpcr = (int)rMode << (int)Fpcr.RMode; @@ -2455,8 +2456,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); int fpcr = (int)rMode << (int)Fpcr.RMode; @@ -2475,8 +2476,8 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); int fpcr = (int)rMode << (int)Fpcr.RMode; @@ -2494,8 +2495,8 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x7EE0B800; // NEG D0, D0 opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2513,8 +2514,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2532,8 +2533,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2549,8 +2550,8 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x2E205800; // NOT V0.8B, V0.8B opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2566,8 +2567,8 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x6E205800; // NOT V0.16B, V0.16B opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2583,8 +2584,8 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x2E605800; // RBIT V0.8B, V0.8B opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2600,8 +2601,8 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x6E605800; // RBIT V0.16B, V0.16B opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2617,8 +2618,8 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x0E201800; // REV16 V0.8B, V0.8B opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2634,8 +2635,8 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x4E201800; // REV16 V0.16B, V0.16B opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2653,8 +2654,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2672,8 +2673,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2691,8 +2692,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2710,8 +2711,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2729,8 +2730,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2748,8 +2749,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2767,8 +2768,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2786,8 +2787,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2805,8 +2806,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2824,8 +2825,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2837,8 +2838,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1S_")] [Random(RndCnt)] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2850,8 +2851,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1D_")] [Random(RndCnt)] ulong a) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2869,8 +2870,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2886,8 +2887,8 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2903,8 +2904,8 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z0, z1); - Vector128<float> v1 = MakeVectorE0E1(a0, a1); + V128 v0 = MakeVectorE0E1(z0, z1); + V128 v1 = MakeVectorE0E1(a0, a1); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2920,8 +2921,8 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z0, z1); - Vector128<float> v1 = MakeVectorE0E1(a0, a1); + V128 v0 = MakeVectorE0E1(z0, z1); + V128 v1 = MakeVectorE0E1(a0, a1); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -2941,8 +2942,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((size & 3) << 22); opcode |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2960,8 +2961,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2979,8 +2980,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -2998,8 +2999,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3017,8 +3018,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3036,8 +3037,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3055,8 +3056,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3074,8 +3075,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3093,8 +3094,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3112,8 +3113,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3131,8 +3132,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3150,8 +3151,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3169,8 +3170,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3188,8 +3189,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3207,8 +3208,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3226,8 +3227,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3245,8 +3246,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3264,8 +3265,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3283,8 +3284,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3302,8 +3303,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3321,8 +3322,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3340,8 +3341,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3359,8 +3360,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3378,8 +3379,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3397,8 +3398,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3416,8 +3417,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3435,8 +3436,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -3454,8 +3455,8 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdCrypto.cs b/Ryujinx.Tests/Cpu/CpuTestSimdCrypto.cs index 4702b986..fd8ec9c5 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdCrypto.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdCrypto.cs @@ -1,11 +1,9 @@ // https://www.intel.com/content/dam/doc/white-paper/advanced-encryption-standard-new-instructions-set-paper.pdf -using ChocolArm64.State; +using ARMeilleure.State; using NUnit.Framework; -using System.Runtime.Intrinsics; - namespace Ryujinx.Tests.Cpu { public class CpuTestSimdCrypto : CpuTest @@ -23,20 +21,20 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x4E285800; // AESD V0.16B, V0.16B opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(roundKeyL ^ valueL, roundKeyH ^ valueH); - Vector128<float> v1 = MakeVectorE0E1(roundKeyL, roundKeyH); + V128 v0 = MakeVectorE0E1(roundKeyL ^ valueL, roundKeyH ^ valueH); + V128 v1 = MakeVectorE0E1(roundKeyL, roundKeyH); - CpuThreadState threadState = SingleOpcode(opcode, v0: v0, v1: v1); + ExecutionContext context = SingleOpcode(opcode, v0: v0, v1: v1); Assert.Multiple(() => { - Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(resultL)); - Assert.That(GetVectorE1(threadState.V0), Is.EqualTo(resultH)); + Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL)); + Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH)); }); Assert.Multiple(() => { - Assert.That(GetVectorE0(threadState.V1), Is.EqualTo(roundKeyL)); - Assert.That(GetVectorE1(threadState.V1), Is.EqualTo(roundKeyH)); + Assert.That(GetVectorE0(context.GetV(1)), Is.EqualTo(roundKeyL)); + Assert.That(GetVectorE1(context.GetV(1)), Is.EqualTo(roundKeyH)); }); CompareAgainstUnicorn(); @@ -55,20 +53,20 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x4E284800; // AESE V0.16B, V0.16B opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(roundKeyL ^ valueL, roundKeyH ^ valueH); - Vector128<float> v1 = MakeVectorE0E1(roundKeyL, roundKeyH); + V128 v0 = MakeVectorE0E1(roundKeyL ^ valueL, roundKeyH ^ valueH); + V128 v1 = MakeVectorE0E1(roundKeyL, roundKeyH); - CpuThreadState threadState = SingleOpcode(opcode, v0: v0, v1: v1); + ExecutionContext context = SingleOpcode(opcode, v0: v0, v1: v1); Assert.Multiple(() => { - Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(resultL)); - Assert.That(GetVectorE1(threadState.V0), Is.EqualTo(resultH)); + Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL)); + Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH)); }); Assert.Multiple(() => { - Assert.That(GetVectorE0(threadState.V1), Is.EqualTo(roundKeyL)); - Assert.That(GetVectorE1(threadState.V1), Is.EqualTo(roundKeyH)); + Assert.That(GetVectorE0(context.GetV(1)), Is.EqualTo(roundKeyL)); + Assert.That(GetVectorE1(context.GetV(1)), Is.EqualTo(roundKeyH)); }); CompareAgainstUnicorn(); @@ -85,24 +83,24 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x4E287800; // AESIMC V0.16B, V0.16B opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v = MakeVectorE0E1(valueL, valueH); + V128 v = MakeVectorE0E1(valueL, valueH); - CpuThreadState threadState = SingleOpcode( + ExecutionContext context = SingleOpcode( opcode, - v0: rn == 0u ? v : default(Vector128<float>), - v1: rn == 1u ? v : default(Vector128<float>)); + v0: rn == 0u ? v : default(V128), + v1: rn == 1u ? v : default(V128)); Assert.Multiple(() => { - Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(resultL)); - Assert.That(GetVectorE1(threadState.V0), Is.EqualTo(resultH)); + Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL)); + Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH)); }); if (rn == 1u) { Assert.Multiple(() => { - Assert.That(GetVectorE0(threadState.V1), Is.EqualTo(valueL)); - Assert.That(GetVectorE1(threadState.V1), Is.EqualTo(valueH)); + Assert.That(GetVectorE0(context.GetV(1)), Is.EqualTo(valueL)); + Assert.That(GetVectorE1(context.GetV(1)), Is.EqualTo(valueH)); }); } @@ -120,24 +118,24 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x4E286800; // AESMC V0.16B, V0.16B opcode |= ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v = MakeVectorE0E1(valueL, valueH); + V128 v = MakeVectorE0E1(valueL, valueH); - CpuThreadState threadState = SingleOpcode( + ExecutionContext context = SingleOpcode( opcode, - v0: rn == 0u ? v : default(Vector128<float>), - v1: rn == 1u ? v : default(Vector128<float>)); + v0: rn == 0u ? v : default(V128), + v1: rn == 1u ? v : default(V128)); Assert.Multiple(() => { - Assert.That(GetVectorE0(threadState.V0), Is.EqualTo(resultL)); - Assert.That(GetVectorE1(threadState.V0), Is.EqualTo(resultH)); + Assert.That(GetVectorE0(context.GetV(0)), Is.EqualTo(resultL)); + Assert.That(GetVectorE1(context.GetV(0)), Is.EqualTo(resultH)); }); if (rn == 1u) { Assert.Multiple(() => { - Assert.That(GetVectorE0(threadState.V1), Is.EqualTo(valueL)); - Assert.That(GetVectorE1(threadState.V1), Is.EqualTo(valueH)); + Assert.That(GetVectorE0(context.GetV(1)), Is.EqualTo(valueL)); + Assert.That(GetVectorE1(context.GetV(1)), Is.EqualTo(valueH)); }); } diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdCvt.cs b/Ryujinx.Tests/Cpu/CpuTestSimdCvt.cs index 8e205855..17a2853f 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdCvt.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdCvt.cs @@ -1,10 +1,11 @@ #define SimdCvt +using ARMeilleure.State; + using NUnit.Framework; using System; using System.Collections.Generic; -using System.Runtime.Intrinsics; namespace Ryujinx.Tests.Cpu { @@ -378,7 +379,7 @@ namespace Ryujinx.Tests.Cpu ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32; uint w31 = TestContext.CurrentContext.Random.NextUInt(); - Vector128<float> v1 = MakeVectorE0(a); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, x0: x0, x31: w31, v1: v1); @@ -394,7 +395,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); ulong x31 = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v1 = MakeVectorE0(a); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, x31: x31, v1: v1); @@ -411,7 +412,7 @@ namespace Ryujinx.Tests.Cpu ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32; uint w31 = TestContext.CurrentContext.Random.NextUInt(); - Vector128<float> v1 = MakeVectorE0(a); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, x0: x0, x31: w31, v1: v1); @@ -427,7 +428,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); ulong x31 = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v1 = MakeVectorE0(a); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, x31: x31, v1: v1); @@ -448,7 +449,7 @@ namespace Ryujinx.Tests.Cpu ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32; uint w31 = TestContext.CurrentContext.Random.NextUInt(); - Vector128<float> v1 = MakeVectorE0(a); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, x0: x0, x31: w31, v1: v1); @@ -468,7 +469,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= (scale << 10); ulong x31 = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v1 = MakeVectorE0(a); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, x31: x31, v1: v1); @@ -489,7 +490,7 @@ namespace Ryujinx.Tests.Cpu ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32; uint w31 = TestContext.CurrentContext.Random.NextUInt(); - Vector128<float> v1 = MakeVectorE0(a); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, x0: x0, x31: w31, v1: v1); @@ -509,7 +510,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= (scale << 10); ulong x31 = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v1 = MakeVectorE0(a); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, x31: x31, v1: v1); @@ -526,7 +527,7 @@ namespace Ryujinx.Tests.Cpu uint w31 = TestContext.CurrentContext.Random.NextUInt(); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); + V128 v0 = MakeVectorE0E1(z, z); SingleOpcode(opcodes, x1: wn, x31: w31, v0: v0); @@ -543,7 +544,7 @@ namespace Ryujinx.Tests.Cpu uint w31 = TestContext.CurrentContext.Random.NextUInt(); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); + V128 v0 = MakeVectorE1(z); SingleOpcode(opcodes, x1: wn, x31: w31, v0: v0); @@ -560,7 +561,7 @@ namespace Ryujinx.Tests.Cpu ulong x31 = TestContext.CurrentContext.Random.NextULong(); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); + V128 v0 = MakeVectorE0E1(z, z); SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0); @@ -577,7 +578,7 @@ namespace Ryujinx.Tests.Cpu ulong x31 = TestContext.CurrentContext.Random.NextULong(); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); + V128 v0 = MakeVectorE1(z); SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0); @@ -598,7 +599,7 @@ namespace Ryujinx.Tests.Cpu uint w31 = TestContext.CurrentContext.Random.NextUInt(); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); + V128 v0 = MakeVectorE0E1(z, z); SingleOpcode(opcodes, x1: wn, x31: w31, v0: v0); @@ -619,7 +620,7 @@ namespace Ryujinx.Tests.Cpu uint w31 = TestContext.CurrentContext.Random.NextUInt(); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); + V128 v0 = MakeVectorE1(z); SingleOpcode(opcodes, x1: wn, x31: w31, v0: v0); @@ -640,7 +641,7 @@ namespace Ryujinx.Tests.Cpu ulong x31 = TestContext.CurrentContext.Random.NextULong(); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); + V128 v0 = MakeVectorE0E1(z, z); SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0); @@ -661,7 +662,7 @@ namespace Ryujinx.Tests.Cpu ulong x31 = TestContext.CurrentContext.Random.NextULong(); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); + V128 v0 = MakeVectorE1(z); SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0); diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdExt.cs b/Ryujinx.Tests/Cpu/CpuTestSimdExt.cs index b8548169..0ab40cad 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdExt.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdExt.cs @@ -1,8 +1,8 @@ #define SimdExt -using NUnit.Framework; +using ARMeilleure.State; -using System.Runtime.Intrinsics; +using NUnit.Framework; namespace Ryujinx.Tests.Cpu { @@ -37,9 +37,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= (imm4 << 11); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -61,9 +61,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= (imm4 << 11); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdFcond.cs b/Ryujinx.Tests/Cpu/CpuTestSimdFcond.cs index 4ccd43db..825a1c78 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdFcond.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdFcond.cs @@ -1,9 +1,10 @@ #define SimdFcond +using ARMeilleure.State; + using NUnit.Framework; using System.Collections.Generic; -using System.Runtime.Intrinsics; namespace Ryujinx.Tests.Cpu { @@ -152,8 +153,8 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((cond & 15) << 12) | ((nzcv & 15) << 0); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); bool v = TestContext.CurrentContext.Random.NextBool(); bool c = TestContext.CurrentContext.Random.NextBool(); @@ -177,8 +178,8 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((cond & 15) << 12) | ((nzcv & 15) << 0); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); bool v = TestContext.CurrentContext.Random.NextBool(); bool c = TestContext.CurrentContext.Random.NextBool(); @@ -202,9 +203,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((cond & 15) << 12); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); @@ -223,9 +224,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((cond & 15) << 12); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdFmov.cs b/Ryujinx.Tests/Cpu/CpuTestSimdFmov.cs index a7e0e0f9..534dba57 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdFmov.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdFmov.cs @@ -1,8 +1,8 @@ #define SimdFmov -using NUnit.Framework; +using ARMeilleure.State; -using System.Runtime.Intrinsics; +using NUnit.Framework; namespace Ryujinx.Tests.Cpu { @@ -36,7 +36,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((imm8 & 0xFFu) << 13); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); + V128 v0 = MakeVectorE0E1(z, z); SingleOpcode(opcodes, v0: v0); @@ -50,7 +50,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((imm8 & 0xFFu) << 13); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); + V128 v0 = MakeVectorE1(z); SingleOpcode(opcodes, v0: v0); diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdImm.cs b/Ryujinx.Tests/Cpu/CpuTestSimdImm.cs index ce8f63bc..1ea74a11 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdImm.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdImm.cs @@ -1,9 +1,10 @@ #define SimdImm +using ARMeilleure.State; + using NUnit.Framework; using System.Collections.Generic; -using System.Runtime.Intrinsics; namespace Ryujinx.Tests.Cpu { @@ -203,7 +204,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((amount & 1) << 13); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); + V128 v0 = MakeVectorE0E1(z, z); SingleOpcode(opcodes, v0: v0); @@ -224,7 +225,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((amount & 3) << 13); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); + V128 v0 = MakeVectorE0E1(z, z); SingleOpcode(opcodes, v0: v0); @@ -241,7 +242,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= (abc << 16) | (defgh << 5); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); + V128 v0 = MakeVectorE1(z); SingleOpcode(opcodes, v0: v0); @@ -288,7 +289,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((q & 1) << 30); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(q == 0u ? z : 0ul); + V128 v0 = MakeVectorE1(q == 0u ? z : 0ul); SingleOpcode(opcodes, v0: v0); @@ -309,7 +310,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((q & 1) << 30); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(q == 0u ? z : 0ul); + V128 v0 = MakeVectorE1(q == 0u ? z : 0ul); SingleOpcode(opcodes, v0: v0); @@ -330,7 +331,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((q & 1) << 30); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(q == 0u ? z : 0ul); + V128 v0 = MakeVectorE1(q == 0u ? z : 0ul); SingleOpcode(opcodes, v0: v0); @@ -351,7 +352,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((q & 1) << 30); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(q == 0u ? z : 0ul); + V128 v0 = MakeVectorE1(q == 0u ? z : 0ul); SingleOpcode(opcodes, v0: v0); @@ -370,7 +371,7 @@ namespace Ryujinx.Tests.Cpu opcodes |= (abc << 16) | (defgh << 5); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); + V128 v0 = MakeVectorE1(z); SingleOpcode(opcodes, v0: v0); diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdIns.cs b/Ryujinx.Tests/Cpu/CpuTestSimdIns.cs index ea372704..031ed0f2 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdIns.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdIns.cs @@ -1,8 +1,8 @@ #define SimdIns -using NUnit.Framework; +using ARMeilleure.State; -using System.Runtime.Intrinsics; +using NUnit.Framework; namespace Ryujinx.Tests.Cpu { @@ -86,7 +86,7 @@ namespace Ryujinx.Tests.Cpu uint w31 = TestContext.CurrentContext.Random.NextUInt(); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); + V128 v0 = MakeVectorE0E1(z, z); SingleOpcode(opcode, x1: wn, x31: w31, v0: v0); @@ -103,7 +103,7 @@ namespace Ryujinx.Tests.Cpu ulong x31 = TestContext.CurrentContext.Random.NextULong(); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); + V128 v0 = MakeVectorE0E1(z, z); SingleOpcode(opcode, x1: xn, x31: x31, v0: v0); @@ -122,8 +122,8 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -142,8 +142,8 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -162,8 +162,8 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -182,8 +182,8 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -207,8 +207,8 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); opcode |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -232,8 +232,8 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); opcode |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -257,8 +257,8 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); opcode |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -282,8 +282,8 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); opcode |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -306,7 +306,7 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); uint w31 = TestContext.CurrentContext.Random.NextUInt(); - Vector128<float> v0 = MakeVectorE0E1(z, z); + V128 v0 = MakeVectorE0E1(z, z); SingleOpcode(opcode, x1: wn, x31: w31, v0: v0); @@ -329,7 +329,7 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); uint w31 = TestContext.CurrentContext.Random.NextUInt(); - Vector128<float> v0 = MakeVectorE0E1(z, z); + V128 v0 = MakeVectorE0E1(z, z); SingleOpcode(opcode, x1: wn, x31: w31, v0: v0); @@ -352,7 +352,7 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); uint w31 = TestContext.CurrentContext.Random.NextUInt(); - Vector128<float> v0 = MakeVectorE0E1(z, z); + V128 v0 = MakeVectorE0E1(z, z); SingleOpcode(opcode, x1: wn, x31: w31, v0: v0); @@ -375,7 +375,7 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); ulong x31 = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); + V128 v0 = MakeVectorE0E1(z, z); SingleOpcode(opcode, x1: xn, x31: x31, v0: v0); @@ -400,8 +400,8 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); opcode |= (imm4 << 11); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -426,8 +426,8 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); opcode |= (imm4 << 11); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -452,8 +452,8 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); opcode |= (imm4 << 11); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -478,8 +478,8 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); opcode |= (imm4 << 11); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, v0: v0, v1: v1); @@ -502,7 +502,7 @@ namespace Ryujinx.Tests.Cpu ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32; uint w31 = TestContext.CurrentContext.Random.NextUInt(); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, x0: x0, x31: w31, v1: v1); @@ -525,7 +525,7 @@ namespace Ryujinx.Tests.Cpu ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32; uint w31 = TestContext.CurrentContext.Random.NextUInt(); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, x0: x0, x31: w31, v1: v1); @@ -547,7 +547,7 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); ulong x31 = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, x31: x31, v1: v1); @@ -569,7 +569,7 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); ulong x31 = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, x31: x31, v1: v1); @@ -591,7 +591,7 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); ulong x31 = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, x31: x31, v1: v1); @@ -614,7 +614,7 @@ namespace Ryujinx.Tests.Cpu ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32; uint w31 = TestContext.CurrentContext.Random.NextUInt(); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, x0: x0, x31: w31, v1: v1); @@ -637,7 +637,7 @@ namespace Ryujinx.Tests.Cpu ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32; uint w31 = TestContext.CurrentContext.Random.NextUInt(); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, x0: x0, x31: w31, v1: v1); @@ -660,7 +660,7 @@ namespace Ryujinx.Tests.Cpu ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32; uint w31 = TestContext.CurrentContext.Random.NextUInt(); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, x0: x0, x31: w31, v1: v1); @@ -682,7 +682,7 @@ namespace Ryujinx.Tests.Cpu opcode |= (imm5 << 16); ulong x31 = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcode, x31: x31, v1: v1); diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdReg.cs b/Ryujinx.Tests/Cpu/CpuTestSimdReg.cs index d9b82801..9b767db4 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdReg.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdReg.cs @@ -1,9 +1,10 @@ #define SimdReg +using ARMeilleure.State; + using NUnit.Framework; using System.Collections.Generic; -using System.Runtime.Intrinsics; namespace Ryujinx.Tests.Cpu { @@ -570,9 +571,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x5EE08400; // ADD D0, D0, D0 opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -592,9 +593,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -614,9 +615,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -636,9 +637,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -658,9 +659,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -680,9 +681,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -702,9 +703,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -722,9 +723,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x0E201C00; // AND V0.8B, V0.8B, V0.8B opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -742,9 +743,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x4E201C00; // AND V0.16B, V0.16B, V0.16B opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -762,9 +763,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x0E601C00; // BIC V0.8B, V0.8B, V0.8B opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -782,9 +783,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x4E601C00; // BIC V0.16B, V0.16B, V0.16B opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -802,9 +803,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x2EE01C00; // BIF V0.8B, V0.8B, V0.8B opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -822,9 +823,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x6EE01C00; // BIF V0.16B, V0.16B, V0.16B opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -842,9 +843,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x2EA01C00; // BIT V0.8B, V0.8B, V0.8B opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -862,9 +863,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x6EA01C00; // BIT V0.16B, V0.16B, V0.16B opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -882,9 +883,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x2E601C00; // BSL V0.8B, V0.8B, V0.8B opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -902,9 +903,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x6E601C00; // BSL V0.16B, V0.16B, V0.16B opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -922,9 +923,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x7EE08C00; // CMEQ D0, D0, D0 opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -944,9 +945,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -966,9 +967,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -986,9 +987,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x5EE03C00; // CMGE D0, D0, D0 opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1008,9 +1009,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1030,9 +1031,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1050,9 +1051,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x5EE03400; // CMGT D0, D0, D0 opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1072,9 +1073,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1094,9 +1095,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1114,9 +1115,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x7EE03400; // CMHI D0, D0, D0 opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1136,9 +1137,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1158,9 +1159,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1178,9 +1179,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x7EE03C00; // CMHS D0, D0, D0 opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1200,9 +1201,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1222,9 +1223,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1242,9 +1243,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x5EE08C00; // CMTST D0, D0, D0 opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1264,9 +1265,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1286,9 +1287,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1306,9 +1307,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x2E201C00; // EOR V0.8B, V0.8B, V0.8B opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1326,9 +1327,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x6E201C00; // EOR V0.16B, V0.16B, V0.16B opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1341,9 +1342,9 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1S_F_")] ulong b) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1361,9 +1362,9 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1D_F_")] ulong b) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1388,9 +1389,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); - Vector128<float> v2 = MakeVectorE0E1(b, b * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); + V128 v2 = MakeVectorE0E1(b, b * q); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1413,9 +1414,9 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1433,9 +1434,9 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1S_F_")] ulong b) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1452,9 +1453,9 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1D_F_")] ulong b) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1478,9 +1479,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); - Vector128<float> v2 = MakeVectorE0E1(b, b * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); + V128 v2 = MakeVectorE0E1(b, b * q); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1502,9 +1503,9 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1520,8 +1521,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1S_F_")] ulong a, [ValueSource("_1S_F_")] ulong b) { - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); bool v = TestContext.CurrentContext.Random.NextBool(); bool c = TestContext.CurrentContext.Random.NextBool(); @@ -1538,8 +1539,8 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1D_F_")] ulong a, [ValueSource("_1D_F_")] ulong b) { - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); bool v = TestContext.CurrentContext.Random.NextBool(); bool c = TestContext.CurrentContext.Random.NextBool(); @@ -1558,10 +1559,10 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1S_F_")] ulong c) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); - Vector128<float> v3 = MakeVectorE0(c); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); + V128 v3 = MakeVectorE0(c); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1580,10 +1581,10 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1D_F_")] ulong c) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); - Vector128<float> v3 = MakeVectorE0(c); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); + V128 v3 = MakeVectorE0(c); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1601,9 +1602,9 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1S_F_")] ulong b) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1621,9 +1622,9 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1D_F_")] ulong b) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1648,9 +1649,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); - Vector128<float> v2 = MakeVectorE0E1(b, b * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); + V128 v2 = MakeVectorE0E1(b, b * q); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1673,9 +1674,9 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1700,9 +1701,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); - Vector128<float> v2 = MakeVectorE0E1(b, b * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); + V128 v2 = MakeVectorE0E1(b, b * q); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1725,9 +1726,9 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1745,9 +1746,9 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1S_F_")] ulong b) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1765,9 +1766,9 @@ namespace Ryujinx.Tests.Cpu [ValueSource("_1D_F_")] ulong b) { ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1792,9 +1793,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); - Vector128<float> v2 = MakeVectorE0E1(b, b * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); + V128 v2 = MakeVectorE0E1(b, b * q); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1817,9 +1818,9 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -1844,9 +1845,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); @@ -1866,9 +1867,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); @@ -1886,9 +1887,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x0EE01C00; // ORN V0.8B, V0.8B, V0.8B opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1906,9 +1907,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x4EE01C00; // ORN V0.16B, V0.16B, V0.16B opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1926,9 +1927,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x0EA01C00; // ORR V0.8B, V0.8B, V0.8B opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1946,9 +1947,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x4EA01C00; // ORR V0.16B, V0.16B, V0.16B opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1968,9 +1969,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -1990,9 +1991,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2012,9 +2013,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2034,9 +2035,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2056,9 +2057,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2078,9 +2079,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2100,9 +2101,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2122,9 +2123,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE1(a); - Vector128<float> v2 = MakeVectorE1(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE1(a); + V128 v2 = MakeVectorE1(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2144,9 +2145,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2166,9 +2167,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2188,9 +2189,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2210,9 +2211,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE1(a); - Vector128<float> v2 = MakeVectorE1(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE1(a); + V128 v2 = MakeVectorE1(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2232,9 +2233,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2254,9 +2255,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE1(a); - Vector128<float> v2 = MakeVectorE1(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE1(a); + V128 v2 = MakeVectorE1(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2276,9 +2277,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2298,9 +2299,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE1(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE1(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2318,9 +2319,9 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z0, z1); - Vector128<float> v1 = MakeVectorE0E1(a0, a1); - Vector128<float> v2 = MakeVectorE0E1(b0, b1); + V128 v0 = MakeVectorE0E1(z0, z1); + V128 v1 = MakeVectorE0E1(a0, a1); + V128 v2 = MakeVectorE0E1(b0, b1); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); @@ -2338,9 +2339,9 @@ namespace Ryujinx.Tests.Cpu { opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z0, z1); - Vector128<float> v1 = MakeVectorE0E1(a0, a1); - Vector128<float> v2 = MakeVectorE0E1(b0, b1); + V128 v0 = MakeVectorE0E1(z0, z1); + V128 v1 = MakeVectorE0E1(a0, a1); + V128 v2 = MakeVectorE0E1(b0, b1); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); @@ -2360,9 +2361,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2382,9 +2383,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2404,9 +2405,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2426,9 +2427,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2450,9 +2451,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((size & 3) << 22); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); - Vector128<float> v2 = MakeVectorE0E1(b, b * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); + V128 v2 = MakeVectorE0E1(b, b * q); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); @@ -2472,9 +2473,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); @@ -2494,9 +2495,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE1(a); - Vector128<float> v2 = MakeVectorE1(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE1(a); + V128 v2 = MakeVectorE1(b); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); @@ -2516,9 +2517,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2538,9 +2539,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2560,9 +2561,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2582,9 +2583,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2604,9 +2605,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2626,9 +2627,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2648,9 +2649,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2670,9 +2671,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2692,9 +2693,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2714,9 +2715,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2736,9 +2737,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2758,9 +2759,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2780,9 +2781,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2802,9 +2803,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2824,9 +2825,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); @@ -2846,9 +2847,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); @@ -2868,9 +2869,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2890,9 +2891,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE1(a); - Vector128<float> v2 = MakeVectorE1(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE1(a); + V128 v2 = MakeVectorE1(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2912,9 +2913,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2934,9 +2935,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE1(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE1(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2954,9 +2955,9 @@ namespace Ryujinx.Tests.Cpu uint opcode = 0x7EE08400; // SUB D0, D0, D0 opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2976,9 +2977,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -2998,9 +2999,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3020,9 +3021,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3042,9 +3043,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3064,9 +3065,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3086,9 +3087,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, ~z); - Vector128<float> v1 = MakeVectorE0E1(a, ~a); - Vector128<float> v2 = MakeVectorE0E1(b, ~b); + V128 v0 = MakeVectorE0E1(z, ~z); + V128 v1 = MakeVectorE0E1(a, ~a); + V128 v2 = MakeVectorE0E1(b, ~b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3108,9 +3109,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3130,9 +3131,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, ~z); - Vector128<float> v1 = MakeVectorE0E1(a, ~a); - Vector128<float> v2 = MakeVectorE0E1(b, ~b); + V128 v0 = MakeVectorE0E1(z, ~z); + V128 v1 = MakeVectorE0E1(a, ~a); + V128 v2 = MakeVectorE0E1(b, ~b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3152,9 +3153,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3174,9 +3175,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3196,9 +3197,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3218,9 +3219,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE1(a); - Vector128<float> v2 = MakeVectorE1(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE1(a); + V128 v2 = MakeVectorE1(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3240,9 +3241,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3262,9 +3263,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3284,9 +3285,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3306,9 +3307,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE1(a); - Vector128<float> v2 = MakeVectorE1(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE1(a); + V128 v2 = MakeVectorE1(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3328,9 +3329,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3350,9 +3351,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE1(a); - Vector128<float> v2 = MakeVectorE1(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE1(a); + V128 v2 = MakeVectorE1(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3372,9 +3373,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3394,9 +3395,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE1(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE1(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3416,9 +3417,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3438,9 +3439,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3460,9 +3461,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3482,9 +3483,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3504,9 +3505,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3526,9 +3527,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3548,9 +3549,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3570,9 +3571,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3592,9 +3593,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3614,9 +3615,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3636,9 +3637,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3658,9 +3659,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3680,9 +3681,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3702,9 +3703,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE1(a); - Vector128<float> v2 = MakeVectorE1(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE1(a); + V128 v2 = MakeVectorE1(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3724,9 +3725,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3746,9 +3747,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE1(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE1(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3768,9 +3769,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3790,9 +3791,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, ~z); - Vector128<float> v1 = MakeVectorE0E1(a, ~a); - Vector128<float> v2 = MakeVectorE0E1(b, ~b); + V128 v0 = MakeVectorE0E1(z, ~z); + V128 v1 = MakeVectorE0E1(a, ~a); + V128 v2 = MakeVectorE0E1(b, ~b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3812,9 +3813,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3834,9 +3835,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, ~z); - Vector128<float> v1 = MakeVectorE0E1(a, ~a); - Vector128<float> v2 = MakeVectorE0E1(b, ~b); + V128 v0 = MakeVectorE0E1(z, ~z); + V128 v1 = MakeVectorE0E1(a, ~a); + V128 v2 = MakeVectorE0E1(b, ~b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3856,9 +3857,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3878,9 +3879,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, ~z); - Vector128<float> v1 = MakeVectorE0E1(a, ~a); - Vector128<float> v2 = MakeVectorE0E1(b, ~b); + V128 v0 = MakeVectorE0E1(z, ~z); + V128 v1 = MakeVectorE0E1(a, ~a); + V128 v2 = MakeVectorE0E1(b, ~b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3900,9 +3901,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0(b); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0(b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); @@ -3922,9 +3923,9 @@ namespace Ryujinx.Tests.Cpu opcode |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcode |= ((size & 3) << 22); - Vector128<float> v0 = MakeVectorE0E1(z, ~z); - Vector128<float> v1 = MakeVectorE0E1(a, ~a); - Vector128<float> v2 = MakeVectorE0E1(b, ~b); + V128 v0 = MakeVectorE0E1(z, ~z); + V128 v1 = MakeVectorE0E1(a, ~a); + V128 v2 = MakeVectorE0E1(b, ~b); SingleOpcode(opcode, v0: v0, v1: v1, v2: v2); diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdRegElem.cs b/Ryujinx.Tests/Cpu/CpuTestSimdRegElem.cs index 64f9bc6c..23e0e364 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdRegElem.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdRegElem.cs @@ -1,8 +1,8 @@ #define SimdRegElem -using NUnit.Framework; +using ARMeilleure.State; -using System.Runtime.Intrinsics; +using NUnit.Framework; namespace Ryujinx.Tests.Cpu { @@ -95,9 +95,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= (l << 21) | (m << 20) | (h << 11); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); - Vector128<float> v2 = MakeVectorE0E1(b, b * h); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); + V128 v2 = MakeVectorE0E1(b, b * h); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); @@ -122,9 +122,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= (l << 21) | (h << 11); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); - Vector128<float> v2 = MakeVectorE0E1(b, b * h); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); + V128 v2 = MakeVectorE0E1(b, b * h); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); @@ -150,9 +150,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= (l << 21) | (m << 20) | (h << 11); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul); - Vector128<float> v2 = MakeVectorE0E1(b, b * h); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul); + V128 v2 = MakeVectorE0E1(b, b * h); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); @@ -177,9 +177,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= (l << 21) | (h << 11); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul); - Vector128<float> v2 = MakeVectorE0E1(b, b * h); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul); + V128 v2 = MakeVectorE0E1(b, b * h); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdRegElemF.cs b/Ryujinx.Tests/Cpu/CpuTestSimdRegElemF.cs index 51027195..38197fd5 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdRegElemF.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdRegElemF.cs @@ -1,9 +1,10 @@ #define SimdRegElemF +using ARMeilleure.State; + using NUnit.Framework; using System.Collections.Generic; -using System.Runtime.Intrinsics; namespace Ryujinx.Tests.Cpu { @@ -230,9 +231,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= (l << 21) | (h << 11); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0E1(b, b * h); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0E1(b, b * h); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -255,9 +256,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= h << 11; - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0E1(b, b * h); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0E1(b, b * h); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -287,9 +288,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= (l << 21) | (h << 11); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); - Vector128<float> v2 = MakeVectorE0E1(b, b * h); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); + V128 v2 = MakeVectorE0E1(b, b * h); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -316,9 +317,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= h << 11; - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b * h); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b * h); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -342,9 +343,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= (l << 21) | (h << 11); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0E1(b, b * h); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0E1(b, b * h); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -367,9 +368,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= h << 11; ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE1(z); - Vector128<float> v1 = MakeVectorE0(a); - Vector128<float> v2 = MakeVectorE0E1(b, b * h); + V128 v0 = MakeVectorE1(z); + V128 v1 = MakeVectorE0(a); + V128 v2 = MakeVectorE0E1(b, b * h); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -399,9 +400,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= (l << 21) | (h << 11); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); - Vector128<float> v2 = MakeVectorE0E1(b, b * h); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); + V128 v2 = MakeVectorE0E1(b, b * h); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); @@ -428,9 +429,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= h << 11; - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); - Vector128<float> v2 = MakeVectorE0E1(b, b * h); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); + V128 v2 = MakeVectorE0E1(b, b * h); int rnd = (int)TestContext.CurrentContext.Random.NextUInt(); diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdShImm.cs b/Ryujinx.Tests/Cpu/CpuTestSimdShImm.cs index 54ed044d..fbbc9f9f 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdShImm.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdShImm.cs @@ -1,10 +1,11 @@ #define SimdShImm +using ARMeilleure.State; + using NUnit.Framework; using System; using System.Collections.Generic; -using System.Runtime.Intrinsics; namespace Ryujinx.Tests.Cpu { @@ -488,8 +489,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -509,8 +510,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= (immHb << 16); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -532,8 +533,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -553,8 +554,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= (immHb << 16); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -574,8 +575,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= (immHb << 16); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -597,8 +598,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -620,8 +621,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -643,8 +644,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -664,8 +665,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= (immHb << 16); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -687,8 +688,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -710,8 +711,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -733,8 +734,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(q == 0u ? a : 0ul, q == 1u ? a : 0ul); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -754,8 +755,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= (immHb << 16); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -777,8 +778,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -800,8 +801,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -823,8 +824,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a * q); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a * q); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -844,8 +845,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= (immHb << 16); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -867,8 +868,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -890,8 +891,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -913,8 +914,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(a, a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(a, a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -934,8 +935,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= (immHb << 16); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -955,8 +956,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= (immHb << 16); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -976,8 +977,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0); opcodes |= (immHb << 16); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -999,8 +1000,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -1022,8 +1023,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); @@ -1045,8 +1046,8 @@ namespace Ryujinx.Tests.Cpu opcodes |= (immHb << 16); opcodes |= ((q & 1) << 30); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0(a); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0(a); SingleOpcode(opcodes, v0: v0, v1: v1); diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdTbl.cs b/Ryujinx.Tests/Cpu/CpuTestSimdTbl.cs index 69195af2..5e6546ab 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdTbl.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdTbl.cs @@ -1,9 +1,10 @@ #define SimdTbl +using ARMeilleure.State; + using NUnit.Framework; using System.Collections.Generic; -using System.Runtime.Intrinsics; namespace Ryujinx.Tests.Cpu { @@ -146,9 +147,9 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((q & 1) << 30); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(table0, table0); - Vector128<float> v2 = MakeVectorE0E1(indexes, q == 1u ? indexes : 0ul); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(table0, table0); + V128 v2 = MakeVectorE0E1(indexes, q == 1u ? indexes : 0ul); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2); @@ -169,10 +170,10 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((q & 1) << 30); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(table0, table0); - Vector128<float> v2 = MakeVectorE0E1(table1, table1); - Vector128<float> v3 = MakeVectorE0E1(indexes, q == 1u ? indexes : 0ul); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(table0, table0); + V128 v2 = MakeVectorE0E1(table1, table1); + V128 v3 = MakeVectorE0E1(indexes, q == 1u ? indexes : 0ul); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2, v3: v3); @@ -193,10 +194,10 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((q & 1) << 30); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v30 = MakeVectorE0E1(z, z); - Vector128<float> v31 = MakeVectorE0E1(table0, table0); - Vector128<float> v0 = MakeVectorE0E1(table1, table1); - Vector128<float> v1 = MakeVectorE0E1(indexes, indexes); + V128 v30 = MakeVectorE0E1(z, z); + V128 v31 = MakeVectorE0E1(table0, table0); + V128 v0 = MakeVectorE0E1(table1, table1); + V128 v1 = MakeVectorE0E1(indexes, indexes); SingleOpcode(opcodes, v0: v0, v1: v1, v30: v30, v31: v31); @@ -218,11 +219,11 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((q & 1) << 30); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(table0, table0); - Vector128<float> v2 = MakeVectorE0E1(table1, table1); - Vector128<float> v3 = MakeVectorE0E1(table2, table2); - Vector128<float> v4 = MakeVectorE0E1(indexes, q == 1u ? indexes : 0ul); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(table0, table0); + V128 v2 = MakeVectorE0E1(table1, table1); + V128 v3 = MakeVectorE0E1(table2, table2); + V128 v4 = MakeVectorE0E1(indexes, q == 1u ? indexes : 0ul); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2, v3: v3, v4: v4); @@ -244,11 +245,11 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((q & 1) << 30); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v30 = MakeVectorE0E1(z, z); - Vector128<float> v31 = MakeVectorE0E1(table0, table0); - Vector128<float> v0 = MakeVectorE0E1(table1, table1); - Vector128<float> v1 = MakeVectorE0E1(table2, table2); - Vector128<float> v2 = MakeVectorE0E1(indexes, indexes); + V128 v30 = MakeVectorE0E1(z, z); + V128 v31 = MakeVectorE0E1(table0, table0); + V128 v0 = MakeVectorE0E1(table1, table1); + V128 v1 = MakeVectorE0E1(table2, table2); + V128 v2 = MakeVectorE0E1(indexes, indexes); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2, v30: v30, v31: v31); @@ -271,12 +272,12 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((q & 1) << 30); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v0 = MakeVectorE0E1(z, z); - Vector128<float> v1 = MakeVectorE0E1(table0, table0); - Vector128<float> v2 = MakeVectorE0E1(table1, table1); - Vector128<float> v3 = MakeVectorE0E1(table2, table2); - Vector128<float> v4 = MakeVectorE0E1(table3, table3); - Vector128<float> v5 = MakeVectorE0E1(indexes, q == 1u ? indexes : 0ul); + V128 v0 = MakeVectorE0E1(z, z); + V128 v1 = MakeVectorE0E1(table0, table0); + V128 v2 = MakeVectorE0E1(table1, table1); + V128 v3 = MakeVectorE0E1(table2, table2); + V128 v4 = MakeVectorE0E1(table3, table3); + V128 v5 = MakeVectorE0E1(indexes, q == 1u ? indexes : 0ul); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2, v3: v3, v4: v4, v5: v5); @@ -299,12 +300,12 @@ namespace Ryujinx.Tests.Cpu opcodes |= ((q & 1) << 30); ulong z = TestContext.CurrentContext.Random.NextULong(); - Vector128<float> v30 = MakeVectorE0E1(z, z); - Vector128<float> v31 = MakeVectorE0E1(table0, table0); - Vector128<float> v0 = MakeVectorE0E1(table1, table1); - Vector128<float> v1 = MakeVectorE0E1(table2, table2); - Vector128<float> v2 = MakeVectorE0E1(table3, table3); - Vector128<float> v3 = MakeVectorE0E1(indexes, indexes); + V128 v30 = MakeVectorE0E1(z, z); + V128 v31 = MakeVectorE0E1(table0, table0); + V128 v0 = MakeVectorE0E1(table1, table1); + V128 v1 = MakeVectorE0E1(table2, table2); + V128 v2 = MakeVectorE0E1(table3, table3); + V128 v3 = MakeVectorE0E1(indexes, indexes); SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2, v3: v3, v30: v30, v31: v31); |