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Diffstat (limited to 'Ryujinx.Tests/Cpu/CpuTestCcmpImm.cs')
-rw-r--r--Ryujinx.Tests/Cpu/CpuTestCcmpImm.cs99
1 files changed, 25 insertions, 74 deletions
diff --git a/Ryujinx.Tests/Cpu/CpuTestCcmpImm.cs b/Ryujinx.Tests/Cpu/CpuTestCcmpImm.cs
index 245b04c0..7ca92d4f 100644
--- a/Ryujinx.Tests/Cpu/CpuTestCcmpImm.cs
+++ b/Ryujinx.Tests/Cpu/CpuTestCcmpImm.cs
@@ -1,4 +1,4 @@
-//#define CcmpImm
+#define CcmpImm
using ChocolArm64.State;
@@ -6,25 +6,20 @@ using NUnit.Framework;
namespace Ryujinx.Tests.Cpu
{
- using Tester;
- using Tester.Types;
-
- [Category("CcmpImm"), Ignore("Tested: second half of 2018.")]
+ [Category("CcmpImm")] // Tested: second half of 2018.
public sealed class CpuTestCcmpImm : CpuTest
{
#if CcmpImm
- [SetUp]
- public void SetupTester()
- {
- AArch64.TakeReset(false);
- }
+ private const int RndCnt = 2;
+ private const int RndCntImm = 2;
+ private const int RndCntNzcv = 2;
- [Test, Description("CCMN <Xn>, #<imm>, #<nzcv>, <cond>")]
+ [Test, Pairwise, Description("CCMN <Xn>, #<imm>, #<nzcv>, <cond>")]
public void Ccmn_64bit([Values(1u, 31u)] uint Rn,
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
- 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(1)] ulong Xn,
- [Values(0u, 31u)] [Random(0u, 31u, 3)] uint imm,
- [Random(0u, 15u, 1)] uint nzcv,
+ 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong Xn,
+ [Values(0u, 31u)] [Random(0u, 31u, RndCntImm)] uint imm,
+ [Random(0u, 15u, RndCntNzcv)] uint nzcv,
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
@@ -35,29 +30,18 @@ namespace Ryujinx.Tests.Cpu
Opcode |= ((imm & 31) << 16) | ((cond & 15) << 12) | ((nzcv & 15) << 0);
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
- AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
- Bits Op = new Bits(Opcode);
-
- AArch64.X((int)Rn, new Bits(Xn));
- Base.Ccmn_Imm(Op[31], Op[20, 16], Op[15, 12], Op[9, 5], Op[3, 0]);
+ AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
- Assert.Multiple(() =>
- {
- Assert.That(ThreadState.Negative, Is.EqualTo(Shared.PSTATE.N));
- Assert.That(ThreadState.Zero, Is.EqualTo(Shared.PSTATE.Z));
- Assert.That(ThreadState.Carry, Is.EqualTo(Shared.PSTATE.C));
- Assert.That(ThreadState.Overflow, Is.EqualTo(Shared.PSTATE.V));
- });
CompareAgainstUnicorn();
}
- [Test, Description("CCMN <Wn>, #<imm>, #<nzcv>, <cond>")]
+ [Test, Pairwise, Description("CCMN <Wn>, #<imm>, #<nzcv>, <cond>")]
public void Ccmn_32bit([Values(1u, 31u)] uint Rn,
[Values(0x00000000u, 0x7FFFFFFFu,
- 0x80000000u, 0xFFFFFFFFu)] [Random(1)] uint Wn,
- [Values(0u, 31u)] [Random(0u, 31u, 3)] uint imm,
- [Random(0u, 15u, 1)] uint nzcv,
+ 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint Wn,
+ [Values(0u, 31u)] [Random(0u, 31u, RndCntImm)] uint imm,
+ [Random(0u, 15u, RndCntNzcv)] uint nzcv,
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
@@ -68,29 +52,18 @@ namespace Ryujinx.Tests.Cpu
Opcode |= ((imm & 31) << 16) | ((cond & 15) << 12) | ((nzcv & 15) << 0);
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
- AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
-
- Bits Op = new Bits(Opcode);
- AArch64.X((int)Rn, new Bits(Wn));
- Base.Ccmn_Imm(Op[31], Op[20, 16], Op[15, 12], Op[9, 5], Op[3, 0]);
+ AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
- Assert.Multiple(() =>
- {
- Assert.That(ThreadState.Negative, Is.EqualTo(Shared.PSTATE.N));
- Assert.That(ThreadState.Zero, Is.EqualTo(Shared.PSTATE.Z));
- Assert.That(ThreadState.Carry, Is.EqualTo(Shared.PSTATE.C));
- Assert.That(ThreadState.Overflow, Is.EqualTo(Shared.PSTATE.V));
- });
CompareAgainstUnicorn();
}
- [Test, Description("CCMP <Xn>, #<imm>, #<nzcv>, <cond>")]
+ [Test, Pairwise, Description("CCMP <Xn>, #<imm>, #<nzcv>, <cond>")]
public void Ccmp_64bit([Values(1u, 31u)] uint Rn,
[Values(0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
- 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(1)] ulong Xn,
- [Values(0u, 31u)] [Random(0u, 31u, 3)] uint imm,
- [Random(0u, 15u, 1)] uint nzcv,
+ 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul)] [Random(RndCnt)] ulong Xn,
+ [Values(0u, 31u)] [Random(0u, 31u, RndCntImm)] uint imm,
+ [Random(0u, 15u, RndCntNzcv)] uint nzcv,
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
@@ -101,29 +74,18 @@ namespace Ryujinx.Tests.Cpu
Opcode |= ((imm & 31) << 16) | ((cond & 15) << 12) | ((nzcv & 15) << 0);
ulong _X31 = TestContext.CurrentContext.Random.NextULong();
- AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
- Bits Op = new Bits(Opcode);
-
- AArch64.X((int)Rn, new Bits(Xn));
- Base.Ccmp_Imm(Op[31], Op[20, 16], Op[15, 12], Op[9, 5], Op[3, 0]);
+ AThreadState ThreadState = SingleOpcode(Opcode, X1: Xn, X31: _X31);
- Assert.Multiple(() =>
- {
- Assert.That(ThreadState.Negative, Is.EqualTo(Shared.PSTATE.N));
- Assert.That(ThreadState.Zero, Is.EqualTo(Shared.PSTATE.Z));
- Assert.That(ThreadState.Carry, Is.EqualTo(Shared.PSTATE.C));
- Assert.That(ThreadState.Overflow, Is.EqualTo(Shared.PSTATE.V));
- });
CompareAgainstUnicorn();
}
- [Test, Description("CCMP <Wn>, #<imm>, #<nzcv>, <cond>")]
+ [Test, Pairwise, Description("CCMP <Wn>, #<imm>, #<nzcv>, <cond>")]
public void Ccmp_32bit([Values(1u, 31u)] uint Rn,
[Values(0x00000000u, 0x7FFFFFFFu,
- 0x80000000u, 0xFFFFFFFFu)] [Random(1)] uint Wn,
- [Values(0u, 31u)] [Random(0u, 31u, 3)] uint imm,
- [Random(0u, 15u, 1)] uint nzcv,
+ 0x80000000u, 0xFFFFFFFFu)] [Random(RndCnt)] uint Wn,
+ [Values(0u, 31u)] [Random(0u, 31u, RndCntImm)] uint imm,
+ [Random(0u, 15u, RndCntNzcv)] uint nzcv,
[Values(0b0000u, 0b0001u, 0b0010u, 0b0011u, // <EQ, NE, CS/HS, CC/LO,
0b0100u, 0b0101u, 0b0110u, 0b0111u, // MI, PL, VS, VC,
0b1000u, 0b1001u, 0b1010u, 0b1011u, // HI, LS, GE, LT,
@@ -134,20 +96,9 @@ namespace Ryujinx.Tests.Cpu
Opcode |= ((imm & 31) << 16) | ((cond & 15) << 12) | ((nzcv & 15) << 0);
uint _W31 = TestContext.CurrentContext.Random.NextUInt();
- AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
-
- Bits Op = new Bits(Opcode);
- AArch64.X((int)Rn, new Bits(Wn));
- Base.Ccmp_Imm(Op[31], Op[20, 16], Op[15, 12], Op[9, 5], Op[3, 0]);
+ AThreadState ThreadState = SingleOpcode(Opcode, X1: Wn, X31: _W31);
- Assert.Multiple(() =>
- {
- Assert.That(ThreadState.Negative, Is.EqualTo(Shared.PSTATE.N));
- Assert.That(ThreadState.Zero, Is.EqualTo(Shared.PSTATE.Z));
- Assert.That(ThreadState.Carry, Is.EqualTo(Shared.PSTATE.C));
- Assert.That(ThreadState.Overflow, Is.EqualTo(Shared.PSTATE.V));
- });
CompareAgainstUnicorn();
}
#endif
generated by cgit v1.2.3 (git 2.39.1) at 2026-08-30 13:32:16 +0000