diff options
Diffstat (limited to 'ChocolArm64/State')
| -rw-r--r-- | ChocolArm64/State/ARegister.cs | 142 | ||||
| -rw-r--r-- | ChocolArm64/State/CpuThreadState.cs (renamed from ChocolArm64/State/AThreadState.cs) | 80 | ||||
| -rw-r--r-- | ChocolArm64/State/ExecutionMode.cs (renamed from ChocolArm64/State/AExecutionMode.cs) | 2 | ||||
| -rw-r--r-- | ChocolArm64/State/FPCR.cs | 11 | ||||
| -rw-r--r-- | ChocolArm64/State/FPSR.cs | 8 | ||||
| -rw-r--r-- | ChocolArm64/State/FpExc.cs (renamed from ChocolArm64/State/FPExc.cs) | 2 | ||||
| -rw-r--r-- | ChocolArm64/State/FpType.cs (renamed from ChocolArm64/State/FPType.cs) | 2 | ||||
| -rw-r--r-- | ChocolArm64/State/Fpcr.cs | 11 | ||||
| -rw-r--r-- | ChocolArm64/State/Fpsr.cs | 8 | ||||
| -rw-r--r-- | ChocolArm64/State/PState.cs (renamed from ChocolArm64/State/APState.cs) | 8 | ||||
| -rw-r--r-- | ChocolArm64/State/Register.cs | 142 | ||||
| -rw-r--r-- | ChocolArm64/State/RegisterSize.cs (renamed from ChocolArm64/State/ARegisterSize.cs) | 6 | ||||
| -rw-r--r-- | ChocolArm64/State/RegisterType.cs (renamed from ChocolArm64/State/ARegisterType.cs) | 2 | ||||
| -rw-r--r-- | ChocolArm64/State/RoundMode.cs (renamed from ChocolArm64/State/ARoundMode.cs) | 2 |
14 files changed, 213 insertions, 213 deletions
diff --git a/ChocolArm64/State/ARegister.cs b/ChocolArm64/State/ARegister.cs deleted file mode 100644 index 5861db8c..00000000 --- a/ChocolArm64/State/ARegister.cs +++ /dev/null @@ -1,142 +0,0 @@ -using System; -using System.Reflection; - -namespace ChocolArm64.State -{ - struct ARegister - { - public int Index; - - public ARegisterType Type; - - public ARegister(int Index, ARegisterType Type) - { - this.Index = Index; - this.Type = Type; - } - - public override int GetHashCode() - { - return (ushort)Index | ((ushort)Type << 16); - } - - public override bool Equals(object Obj) - { - return Obj is ARegister Reg && - Reg.Index == Index && - Reg.Type == Type; - } - - public FieldInfo GetField() - { - switch (Type) - { - case ARegisterType.Flag: return GetFieldFlag(); - case ARegisterType.Int: return GetFieldInt(); - case ARegisterType.Vector: return GetFieldVector(); - } - - throw new InvalidOperationException(); - } - - private FieldInfo GetFieldFlag() - { - switch ((APState)Index) - { - case APState.VBit: return GetField(nameof(AThreadState.Overflow)); - case APState.CBit: return GetField(nameof(AThreadState.Carry)); - case APState.ZBit: return GetField(nameof(AThreadState.Zero)); - case APState.NBit: return GetField(nameof(AThreadState.Negative)); - } - - throw new InvalidOperationException(); - } - - private FieldInfo GetFieldInt() - { - switch (Index) - { - case 0: return GetField(nameof(AThreadState.X0)); - case 1: return GetField(nameof(AThreadState.X1)); - case 2: return GetField(nameof(AThreadState.X2)); - case 3: return GetField(nameof(AThreadState.X3)); - case 4: return GetField(nameof(AThreadState.X4)); - case 5: return GetField(nameof(AThreadState.X5)); - case 6: return GetField(nameof(AThreadState.X6)); - case 7: return GetField(nameof(AThreadState.X7)); - case 8: return GetField(nameof(AThreadState.X8)); - case 9: return GetField(nameof(AThreadState.X9)); - case 10: return GetField(nameof(AThreadState.X10)); - case 11: return GetField(nameof(AThreadState.X11)); - case 12: return GetField(nameof(AThreadState.X12)); - case 13: return GetField(nameof(AThreadState.X13)); - case 14: return GetField(nameof(AThreadState.X14)); - case 15: return GetField(nameof(AThreadState.X15)); - case 16: return GetField(nameof(AThreadState.X16)); - case 17: return GetField(nameof(AThreadState.X17)); - case 18: return GetField(nameof(AThreadState.X18)); - case 19: return GetField(nameof(AThreadState.X19)); - case 20: return GetField(nameof(AThreadState.X20)); - case 21: return GetField(nameof(AThreadState.X21)); - case 22: return GetField(nameof(AThreadState.X22)); - case 23: return GetField(nameof(AThreadState.X23)); - case 24: return GetField(nameof(AThreadState.X24)); - case 25: return GetField(nameof(AThreadState.X25)); - case 26: return GetField(nameof(AThreadState.X26)); - case 27: return GetField(nameof(AThreadState.X27)); - case 28: return GetField(nameof(AThreadState.X28)); - case 29: return GetField(nameof(AThreadState.X29)); - case 30: return GetField(nameof(AThreadState.X30)); - case 31: return GetField(nameof(AThreadState.X31)); - } - - throw new InvalidOperationException(); - } - - private FieldInfo GetFieldVector() - { - switch (Index) - { - case 0: return GetField(nameof(AThreadState.V0)); - case 1: return GetField(nameof(AThreadState.V1)); - case 2: return GetField(nameof(AThreadState.V2)); - case 3: return GetField(nameof(AThreadState.V3)); - case 4: return GetField(nameof(AThreadState.V4)); - case 5: return GetField(nameof(AThreadState.V5)); - case 6: return GetField(nameof(AThreadState.V6)); - case 7: return GetField(nameof(AThreadState.V7)); - case 8: return GetField(nameof(AThreadState.V8)); - case 9: return GetField(nameof(AThreadState.V9)); - case 10: return GetField(nameof(AThreadState.V10)); - case 11: return GetField(nameof(AThreadState.V11)); - case 12: return GetField(nameof(AThreadState.V12)); - case 13: return GetField(nameof(AThreadState.V13)); - case 14: return GetField(nameof(AThreadState.V14)); - case 15: return GetField(nameof(AThreadState.V15)); - case 16: return GetField(nameof(AThreadState.V16)); - case 17: return GetField(nameof(AThreadState.V17)); - case 18: return GetField(nameof(AThreadState.V18)); - case 19: return GetField(nameof(AThreadState.V19)); - case 20: return GetField(nameof(AThreadState.V20)); - case 21: return GetField(nameof(AThreadState.V21)); - case 22: return GetField(nameof(AThreadState.V22)); - case 23: return GetField(nameof(AThreadState.V23)); - case 24: return GetField(nameof(AThreadState.V24)); - case 25: return GetField(nameof(AThreadState.V25)); - case 26: return GetField(nameof(AThreadState.V26)); - case 27: return GetField(nameof(AThreadState.V27)); - case 28: return GetField(nameof(AThreadState.V28)); - case 29: return GetField(nameof(AThreadState.V29)); - case 30: return GetField(nameof(AThreadState.V30)); - case 31: return GetField(nameof(AThreadState.V31)); - } - - throw new InvalidOperationException(); - } - - private FieldInfo GetField(string Name) - { - return typeof(AThreadState).GetField(Name); - } - } -}
\ No newline at end of file diff --git a/ChocolArm64/State/AThreadState.cs b/ChocolArm64/State/CpuThreadState.cs index fbfac5bc..ed106f71 100644 --- a/ChocolArm64/State/AThreadState.cs +++ b/ChocolArm64/State/CpuThreadState.cs @@ -6,17 +6,17 @@ using System.Runtime.Intrinsics; namespace ChocolArm64.State { - public class AThreadState + public class CpuThreadState { - internal const int LRIndex = 30; - internal const int ZRIndex = 31; + internal const int LrIndex = 30; + internal const int ZrIndex = 31; internal const int ErgSizeLog2 = 4; internal const int DczSizeLog2 = 4; private const int MinInstForCheck = 4000000; - internal AExecutionMode ExecutionMode; + internal ExecutionMode ExecutionMode; //AArch32 state. public uint R0, R1, R2, R3, @@ -45,9 +45,9 @@ namespace ChocolArm64.State public bool Running { get; set; } public int Core { get; set; } - private bool Interrupted; + private bool _interrupted; - private int SyncCount; + private int _syncCount; public long TpidrEl0 { get; set; } public long Tpidr { get; set; } @@ -59,10 +59,10 @@ namespace ChocolArm64.State { get { - return (Negative ? (int)APState.N : 0) | - (Zero ? (int)APState.Z : 0) | - (Carry ? (int)APState.C : 0) | - (Overflow ? (int)APState.V : 0); + return (Negative ? (int)PState.N : 0) | + (Zero ? (int)PState.Z : 0) | + (Carry ? (int)PState.C : 0) | + (Overflow ? (int)PState.V : 0); } } @@ -74,38 +74,38 @@ namespace ChocolArm64.State { get { - double Ticks = TickCounter.ElapsedTicks * HostTickFreq; + double ticks = _tickCounter.ElapsedTicks * _hostTickFreq; - return (ulong)(Ticks * CntfrqEl0); + return (ulong)(ticks * CntfrqEl0); } } public event EventHandler<EventArgs> Interrupt; - public event EventHandler<AInstExceptionEventArgs> Break; - public event EventHandler<AInstExceptionEventArgs> SvcCall; - public event EventHandler<AInstUndefinedEventArgs> Undefined; + public event EventHandler<InstExceptionEventArgs> Break; + public event EventHandler<InstExceptionEventArgs> SvcCall; + public event EventHandler<InstUndefinedEventArgs> Undefined; - private static Stopwatch TickCounter; + private static Stopwatch _tickCounter; - private static double HostTickFreq; + private static double _hostTickFreq; - static AThreadState() + static CpuThreadState() { - HostTickFreq = 1.0 / Stopwatch.Frequency; + _hostTickFreq = 1.0 / Stopwatch.Frequency; - TickCounter = new Stopwatch(); + _tickCounter = new Stopwatch(); - TickCounter.Start(); + _tickCounter.Start(); } [MethodImpl(MethodImplOptions.AggressiveInlining)] - internal bool Synchronize(int BbWeight) + internal bool Synchronize(int bbWeight) { //Firing a interrupt frequently is expensive, so we only //do it after a given number of instructions has executed. - SyncCount += BbWeight; + _syncCount += bbWeight; - if (SyncCount >= MinInstForCheck) + if (_syncCount >= MinInstForCheck) { CheckInterrupt(); } @@ -115,50 +115,50 @@ namespace ChocolArm64.State internal void RequestInterrupt() { - Interrupted = true; + _interrupted = true; } [MethodImpl(MethodImplOptions.NoInlining)] private void CheckInterrupt() { - SyncCount = 0; + _syncCount = 0; - if (Interrupted) + if (_interrupted) { - Interrupted = false; + _interrupted = false; Interrupt?.Invoke(this, EventArgs.Empty); } } - internal void OnBreak(long Position, int Imm) + internal void OnBreak(long position, int imm) { - Break?.Invoke(this, new AInstExceptionEventArgs(Position, Imm)); + Break?.Invoke(this, new InstExceptionEventArgs(position, imm)); } - internal void OnSvcCall(long Position, int Imm) + internal void OnSvcCall(long position, int imm) { - SvcCall?.Invoke(this, new AInstExceptionEventArgs(Position, Imm)); + SvcCall?.Invoke(this, new InstExceptionEventArgs(position, imm)); } - internal void OnUndefined(long Position, int RawOpCode) + internal void OnUndefined(long position, int rawOpCode) { - Undefined?.Invoke(this, new AInstUndefinedEventArgs(Position, RawOpCode)); + Undefined?.Invoke(this, new InstUndefinedEventArgs(position, rawOpCode)); } - internal bool GetFpcrFlag(FPCR Flag) + internal bool GetFpcrFlag(Fpcr flag) { - return (Fpcr & (1 << (int)Flag)) != 0; + return (Fpcr & (1 << (int)flag)) != 0; } - internal void SetFpsrFlag(FPSR Flag) + internal void SetFpsrFlag(Fpsr flag) { - Fpsr |= 1 << (int)Flag; + Fpsr |= 1 << (int)flag; } - internal ARoundMode FPRoundingMode() + internal RoundMode FPRoundingMode() { - return (ARoundMode)((Fpcr >> (int)FPCR.RMode) & 3); + return (RoundMode)((Fpcr >> (int)State.Fpcr.RMode) & 3); } } } diff --git a/ChocolArm64/State/AExecutionMode.cs b/ChocolArm64/State/ExecutionMode.cs index 8632da77..4b8c17ce 100644 --- a/ChocolArm64/State/AExecutionMode.cs +++ b/ChocolArm64/State/ExecutionMode.cs @@ -1,6 +1,6 @@ namespace ChocolArm64.State { - enum AExecutionMode + enum ExecutionMode { AArch32, AArch64 diff --git a/ChocolArm64/State/FPCR.cs b/ChocolArm64/State/FPCR.cs deleted file mode 100644 index 8f47cf90..00000000 --- a/ChocolArm64/State/FPCR.cs +++ /dev/null @@ -1,11 +0,0 @@ -namespace ChocolArm64.State -{ - enum FPCR - { - UFE = 11, - RMode = 22, - FZ = 24, - DN = 25, - AHP = 26 - } -} diff --git a/ChocolArm64/State/FPSR.cs b/ChocolArm64/State/FPSR.cs deleted file mode 100644 index d71cde78..00000000 --- a/ChocolArm64/State/FPSR.cs +++ /dev/null @@ -1,8 +0,0 @@ -namespace ChocolArm64.State -{ - enum FPSR - { - UFC = 3, - QC = 27 - } -} diff --git a/ChocolArm64/State/FPExc.cs b/ChocolArm64/State/FpExc.cs index a665957d..5cb7a402 100644 --- a/ChocolArm64/State/FPExc.cs +++ b/ChocolArm64/State/FpExc.cs @@ -1,6 +1,6 @@ namespace ChocolArm64.State { - enum FPExc + enum FpExc { InvalidOp = 0, DivideByZero = 1, diff --git a/ChocolArm64/State/FPType.cs b/ChocolArm64/State/FpType.cs index b00f5fee..fc279106 100644 --- a/ChocolArm64/State/FPType.cs +++ b/ChocolArm64/State/FpType.cs @@ -1,6 +1,6 @@ namespace ChocolArm64.State { - enum FPType + enum FpType { Nonzero, Zero, diff --git a/ChocolArm64/State/Fpcr.cs b/ChocolArm64/State/Fpcr.cs new file mode 100644 index 00000000..908faee5 --- /dev/null +++ b/ChocolArm64/State/Fpcr.cs @@ -0,0 +1,11 @@ +namespace ChocolArm64.State +{ + enum Fpcr + { + Ufe = 11, + RMode = 22, + Fz = 24, + Dn = 25, + Ahp = 26 + } +} diff --git a/ChocolArm64/State/Fpsr.cs b/ChocolArm64/State/Fpsr.cs new file mode 100644 index 00000000..ba551eef --- /dev/null +++ b/ChocolArm64/State/Fpsr.cs @@ -0,0 +1,8 @@ +namespace ChocolArm64.State +{ + enum Fpsr + { + Ufc = 3, + Qc = 27 + } +} diff --git a/ChocolArm64/State/APState.cs b/ChocolArm64/State/PState.cs index aaf0ff0c..40636c87 100644 --- a/ChocolArm64/State/APState.cs +++ b/ChocolArm64/State/PState.cs @@ -3,7 +3,7 @@ using System; namespace ChocolArm64.State { [Flags] - enum APState + enum PState { VBit = 28, CBit = 29, @@ -15,9 +15,9 @@ namespace ChocolArm64.State Z = 1 << ZBit, N = 1 << NBit, - NZ = N | Z, - CV = C | V, + Nz = N | Z, + Cv = C | V, - NZCV = NZ | CV + Nzcv = Nz | Cv } } diff --git a/ChocolArm64/State/Register.cs b/ChocolArm64/State/Register.cs new file mode 100644 index 00000000..ea29e7b6 --- /dev/null +++ b/ChocolArm64/State/Register.cs @@ -0,0 +1,142 @@ +using System; +using System.Reflection; + +namespace ChocolArm64.State +{ + struct Register + { + public int Index; + + public RegisterType Type; + + public Register(int index, RegisterType type) + { + Index = index; + Type = type; + } + + public override int GetHashCode() + { + return (ushort)Index | ((ushort)Type << 16); + } + + public override bool Equals(object obj) + { + return obj is Register reg && + reg.Index == Index && + reg.Type == Type; + } + + public FieldInfo GetField() + { + switch (Type) + { + case RegisterType.Flag: return GetFieldFlag(); + case RegisterType.Int: return GetFieldInt(); + case RegisterType.Vector: return GetFieldVector(); + } + + throw new InvalidOperationException(); + } + + private FieldInfo GetFieldFlag() + { + switch ((PState)Index) + { + case PState.VBit: return GetField(nameof(CpuThreadState.Overflow)); + case PState.CBit: return GetField(nameof(CpuThreadState.Carry)); + case PState.ZBit: return GetField(nameof(CpuThreadState.Zero)); + case PState.NBit: return GetField(nameof(CpuThreadState.Negative)); + } + + throw new InvalidOperationException(); + } + + private FieldInfo GetFieldInt() + { + switch (Index) + { + case 0: return GetField(nameof(CpuThreadState.X0)); + case 1: return GetField(nameof(CpuThreadState.X1)); + case 2: return GetField(nameof(CpuThreadState.X2)); + case 3: return GetField(nameof(CpuThreadState.X3)); + case 4: return GetField(nameof(CpuThreadState.X4)); + case 5: return GetField(nameof(CpuThreadState.X5)); + case 6: return GetField(nameof(CpuThreadState.X6)); + case 7: return GetField(nameof(CpuThreadState.X7)); + case 8: return GetField(nameof(CpuThreadState.X8)); + case 9: return GetField(nameof(CpuThreadState.X9)); + case 10: return GetField(nameof(CpuThreadState.X10)); + case 11: return GetField(nameof(CpuThreadState.X11)); + case 12: return GetField(nameof(CpuThreadState.X12)); + case 13: return GetField(nameof(CpuThreadState.X13)); + case 14: return GetField(nameof(CpuThreadState.X14)); + case 15: return GetField(nameof(CpuThreadState.X15)); + case 16: return GetField(nameof(CpuThreadState.X16)); + case 17: return GetField(nameof(CpuThreadState.X17)); + case 18: return GetField(nameof(CpuThreadState.X18)); + case 19: return GetField(nameof(CpuThreadState.X19)); + case 20: return GetField(nameof(CpuThreadState.X20)); + case 21: return GetField(nameof(CpuThreadState.X21)); + case 22: return GetField(nameof(CpuThreadState.X22)); + case 23: return GetField(nameof(CpuThreadState.X23)); + case 24: return GetField(nameof(CpuThreadState.X24)); + case 25: return GetField(nameof(CpuThreadState.X25)); + case 26: return GetField(nameof(CpuThreadState.X26)); + case 27: return GetField(nameof(CpuThreadState.X27)); + case 28: return GetField(nameof(CpuThreadState.X28)); + case 29: return GetField(nameof(CpuThreadState.X29)); + case 30: return GetField(nameof(CpuThreadState.X30)); + case 31: return GetField(nameof(CpuThreadState.X31)); + } + + throw new InvalidOperationException(); + } + + private FieldInfo GetFieldVector() + { + switch (Index) + { + case 0: return GetField(nameof(CpuThreadState.V0)); + case 1: return GetField(nameof(CpuThreadState.V1)); + case 2: return GetField(nameof(CpuThreadState.V2)); + case 3: return GetField(nameof(CpuThreadState.V3)); + case 4: return GetField(nameof(CpuThreadState.V4)); + case 5: return GetField(nameof(CpuThreadState.V5)); + case 6: return GetField(nameof(CpuThreadState.V6)); + case 7: return GetField(nameof(CpuThreadState.V7)); + case 8: return GetField(nameof(CpuThreadState.V8)); + case 9: return GetField(nameof(CpuThreadState.V9)); + case 10: return GetField(nameof(CpuThreadState.V10)); + case 11: return GetField(nameof(CpuThreadState.V11)); + case 12: return GetField(nameof(CpuThreadState.V12)); + case 13: return GetField(nameof(CpuThreadState.V13)); + case 14: return GetField(nameof(CpuThreadState.V14)); + case 15: return GetField(nameof(CpuThreadState.V15)); + case 16: return GetField(nameof(CpuThreadState.V16)); + case 17: return GetField(nameof(CpuThreadState.V17)); + case 18: return GetField(nameof(CpuThreadState.V18)); + case 19: return GetField(nameof(CpuThreadState.V19)); + case 20: return GetField(nameof(CpuThreadState.V20)); + case 21: return GetField(nameof(CpuThreadState.V21)); + case 22: return GetField(nameof(CpuThreadState.V22)); + case 23: return GetField(nameof(CpuThreadState.V23)); + case 24: return GetField(nameof(CpuThreadState.V24)); + case 25: return GetField(nameof(CpuThreadState.V25)); + case 26: return GetField(nameof(CpuThreadState.V26)); + case 27: return GetField(nameof(CpuThreadState.V27)); + case 28: return GetField(nameof(CpuThreadState.V28)); + case 29: return GetField(nameof(CpuThreadState.V29)); + case 30: return GetField(nameof(CpuThreadState.V30)); + case 31: return GetField(nameof(CpuThreadState.V31)); + } + + throw new InvalidOperationException(); + } + + private FieldInfo GetField(string name) + { + return typeof(CpuThreadState).GetField(name); + } + } +}
\ No newline at end of file diff --git a/ChocolArm64/State/ARegisterSize.cs b/ChocolArm64/State/RegisterSize.cs index 144f36b9..7cc99599 100644 --- a/ChocolArm64/State/ARegisterSize.cs +++ b/ChocolArm64/State/RegisterSize.cs @@ -1,10 +1,10 @@ namespace ChocolArm64.State { - enum ARegisterSize + enum RegisterSize { Int32, Int64, - SIMD64, - SIMD128 + Simd64, + Simd128 } }
\ No newline at end of file diff --git a/ChocolArm64/State/ARegisterType.cs b/ChocolArm64/State/RegisterType.cs index f9776bb7..4476d044 100644 --- a/ChocolArm64/State/ARegisterType.cs +++ b/ChocolArm64/State/RegisterType.cs @@ -1,6 +1,6 @@ namespace ChocolArm64.State { - enum ARegisterType + enum RegisterType { Flag, Int, diff --git a/ChocolArm64/State/ARoundMode.cs b/ChocolArm64/State/RoundMode.cs index 297d0137..b687cc8e 100644 --- a/ChocolArm64/State/ARoundMode.cs +++ b/ChocolArm64/State/RoundMode.cs @@ -1,6 +1,6 @@ namespace ChocolArm64.State { - enum ARoundMode + enum RoundMode { ToNearest = 0, TowardsPlusInfinity = 1, |
