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path: root/ChocolArm64/Instruction/AInstEmitSimdMove.cs
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Diffstat (limited to 'ChocolArm64/Instruction/AInstEmitSimdMove.cs')
-rw-r--r--ChocolArm64/Instruction/AInstEmitSimdMove.cs15
1 files changed, 12 insertions, 3 deletions
diff --git a/ChocolArm64/Instruction/AInstEmitSimdMove.cs b/ChocolArm64/Instruction/AInstEmitSimdMove.cs
index 592cab73..3bf1e463 100644
--- a/ChocolArm64/Instruction/AInstEmitSimdMove.cs
+++ b/ChocolArm64/Instruction/AInstEmitSimdMove.cs
@@ -295,13 +295,22 @@ namespace ChocolArm64.Instruction
int Part = Op.RegisterSize == ARegisterSize.SIMD128 ? Elems : 0;
+ if (Part != 0)
+ {
+ Context.EmitLdvec(Op.Rd);
+ Context.EmitStvectmp();
+ }
+
for (int Index = 0; Index < Elems; Index++)
{
EmitVectorExtractZx(Context, Op.Rn, Index, Op.Size + 1);
- EmitVectorInsert(Context, Op.Rd, Part + Index, Op.Size);
+ EmitVectorInsertTmp(Context, Part + Index, Op.Size);
}
+ Context.EmitLdvectmp();
+ Context.EmitStvec(Op.Rd);
+
if (Part == 0)
{
EmitVectorZeroUpper(Context, Op.Rd);
@@ -342,7 +351,7 @@ namespace ChocolArm64.Instruction
EmitVectorExtractZx(Context, Op.Rm, Idx + Part, Op.Size);
EmitVectorInsertTmp(Context, Idx + 1, Op.Size);
- EmitVectorInsertTmp(Context, Idx , Op.Size);
+ EmitVectorInsertTmp(Context, Idx, Op.Size);
}
Context.EmitLdvectmp();
@@ -398,7 +407,7 @@ namespace ChocolArm64.Instruction
EmitVectorExtractZx(Context, Op.Rm, Base + Index, Op.Size);
EmitVectorInsertTmp(Context, Idx + 1, Op.Size);
- EmitVectorInsertTmp(Context, Idx , Op.Size);
+ EmitVectorInsertTmp(Context, Idx, Op.Size);
}
Context.EmitLdvectmp();