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path: root/ChocolArm64/Instruction/AInstEmitSimdLogical.cs
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Diffstat (limited to 'ChocolArm64/Instruction/AInstEmitSimdLogical.cs')
-rw-r--r--ChocolArm64/Instruction/AInstEmitSimdLogical.cs26
1 files changed, 20 insertions, 6 deletions
diff --git a/ChocolArm64/Instruction/AInstEmitSimdLogical.cs b/ChocolArm64/Instruction/AInstEmitSimdLogical.cs
index f4cc66cf..5b71a0bb 100644
--- a/ChocolArm64/Instruction/AInstEmitSimdLogical.cs
+++ b/ChocolArm64/Instruction/AInstEmitSimdLogical.cs
@@ -1,5 +1,6 @@
+using ChocolArm64.Decoder;
+using ChocolArm64.State;
using ChocolArm64.Translation;
-using System;
using System.Reflection.Emit;
using static ChocolArm64.Instruction.AInstEmitSimdHelper;
@@ -69,12 +70,25 @@ namespace ChocolArm64.Instruction
public static void Rev64_V(AILEmitterCtx Context)
{
- Action Emit = () =>
+ AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp;
+
+ int Bytes = Context.CurrOp.GetBitsCount() >> 3;
+
+ int Elems = Bytes >> Op.Size;
+
+ int RevIndex = Elems - 1;
+
+ for (int Index = 0; Index < (Bytes >> Op.Size); Index++)
+ {
+ EmitVectorExtractZx(Context, Op.Rn, RevIndex--, Op.Size);
+
+ EmitVectorInsert(Context, Op.Rd, Index, Op.Size);
+ }
+
+ if (Op.RegisterSize == ARegisterSize.SIMD64)
{
- ASoftFallback.EmitCall(Context, nameof(ASoftFallback.ReverseBits64));
- };
-
- EmitVectorUnaryOpZx(Context, Emit);
+ EmitVectorZeroUpper(Context, Op.Rd);
+ }
}
}
} \ No newline at end of file