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authorTSR Berry <20988865+TSRBerry@users.noreply.github.com>2023-04-08 01:22:00 +0200
committerMary <thog@protonmail.com>2023-04-27 23:51:14 +0200
commitcee712105850ac3385cd0091a923438167433f9f (patch)
tree4a5274b21d8b7f938c0d0ce18736d3f2993b11b1 /src/Ryujinx.Tests.Unicorn
parentcd124bda587ef09668a971fa1cac1c3f0cfc9f21 (diff)
Move solution and projects to src
Diffstat (limited to 'src/Ryujinx.Tests.Unicorn')
-rw-r--r--src/Ryujinx.Tests.Unicorn/IndexedProperty.cs28
-rw-r--r--src/Ryujinx.Tests.Unicorn/MemoryPermission.cs14
-rw-r--r--src/Ryujinx.Tests.Unicorn/Ryujinx.Tests.Unicorn.csproj17
-rw-r--r--src/Ryujinx.Tests.Unicorn/SimdValue.cs112
-rw-r--r--src/Ryujinx.Tests.Unicorn/UnicornAArch32.cs283
-rw-r--r--src/Ryujinx.Tests.Unicorn/UnicornAArch64.cs298
6 files changed, 752 insertions, 0 deletions
diff --git a/src/Ryujinx.Tests.Unicorn/IndexedProperty.cs b/src/Ryujinx.Tests.Unicorn/IndexedProperty.cs
new file mode 100644
index 00000000..65d445fc
--- /dev/null
+++ b/src/Ryujinx.Tests.Unicorn/IndexedProperty.cs
@@ -0,0 +1,28 @@
+using System;
+
+namespace Ryujinx.Tests.Unicorn
+{
+ public class IndexedProperty<TIndex, TValue>
+ {
+ private Func<TIndex, TValue> _getFunc;
+ private Action<TIndex, TValue> _setAction;
+
+ public IndexedProperty(Func<TIndex, TValue> getFunc, Action<TIndex, TValue> setAction)
+ {
+ _getFunc = getFunc;
+ _setAction = setAction;
+ }
+
+ public TValue this[TIndex index]
+ {
+ get
+ {
+ return _getFunc(index);
+ }
+ set
+ {
+ _setAction(index, value);
+ }
+ }
+ }
+}
diff --git a/src/Ryujinx.Tests.Unicorn/MemoryPermission.cs b/src/Ryujinx.Tests.Unicorn/MemoryPermission.cs
new file mode 100644
index 00000000..044b3176
--- /dev/null
+++ b/src/Ryujinx.Tests.Unicorn/MemoryPermission.cs
@@ -0,0 +1,14 @@
+using System;
+
+namespace Ryujinx.Tests.Unicorn
+{
+ [Flags]
+ public enum MemoryPermission
+ {
+ None = 0,
+ Read = 1,
+ Write = 2,
+ Exec = 4,
+ All = 7,
+ }
+} \ No newline at end of file
diff --git a/src/Ryujinx.Tests.Unicorn/Ryujinx.Tests.Unicorn.csproj b/src/Ryujinx.Tests.Unicorn/Ryujinx.Tests.Unicorn.csproj
new file mode 100644
index 00000000..d925546f
--- /dev/null
+++ b/src/Ryujinx.Tests.Unicorn/Ryujinx.Tests.Unicorn.csproj
@@ -0,0 +1,17 @@
+<Project Sdk="Microsoft.NET.Sdk">
+
+ <PropertyGroup>
+ <TargetFramework>net7.0</TargetFramework>
+ <AllowUnsafeBlocks>true</AllowUnsafeBlocks>
+ <Configurations>Debug;Release</Configurations>
+ </PropertyGroup>
+
+ <PropertyGroup>
+ <GenerateAssemblyInfo>false</GenerateAssemblyInfo>
+ </PropertyGroup>
+
+ <ItemGroup>
+ <PackageReference Include="UnicornEngine.Unicorn" />
+ </ItemGroup>
+
+</Project>
diff --git a/src/Ryujinx.Tests.Unicorn/SimdValue.cs b/src/Ryujinx.Tests.Unicorn/SimdValue.cs
new file mode 100644
index 00000000..2b528430
--- /dev/null
+++ b/src/Ryujinx.Tests.Unicorn/SimdValue.cs
@@ -0,0 +1,112 @@
+using System;
+
+namespace Ryujinx.Tests.Unicorn
+{
+ public struct SimdValue : IEquatable<SimdValue>
+ {
+ private ulong _e0;
+ private ulong _e1;
+
+ public SimdValue(ulong e0, ulong e1)
+ {
+ _e0 = e0;
+ _e1 = e1;
+ }
+
+ public SimdValue(byte[] data)
+ {
+ _e0 = (ulong)BitConverter.ToInt64(data, 0);
+ _e1 = (ulong)BitConverter.ToInt64(data, 8);
+ }
+
+ public float AsFloat()
+ {
+ return GetFloat(0);
+ }
+
+ public double AsDouble()
+ {
+ return GetDouble(0);
+ }
+
+ public float GetFloat(int index)
+ {
+ return BitConverter.Int32BitsToSingle(GetInt32(index));
+ }
+
+ public double GetDouble(int index)
+ {
+ return BitConverter.Int64BitsToDouble(GetInt64(index));
+ }
+
+ public int GetInt32(int index) => (int)GetUInt32(index);
+ public long GetInt64(int index) => (long)GetUInt64(index);
+
+ public uint GetUInt32(int index)
+ {
+ switch (index)
+ {
+ case 0: return (uint)(_e0 >> 0);
+ case 1: return (uint)(_e0 >> 32);
+ case 2: return (uint)(_e1 >> 0);
+ case 3: return (uint)(_e1 >> 32);
+ }
+
+ throw new ArgumentOutOfRangeException(nameof(index));
+ }
+
+ public ulong GetUInt64(int index)
+ {
+ switch (index)
+ {
+ case 0: return _e0;
+ case 1: return _e1;
+ }
+
+ throw new ArgumentOutOfRangeException(nameof(index));
+ }
+
+ public byte[] ToArray()
+ {
+ byte[] e0Data = BitConverter.GetBytes(_e0);
+ byte[] e1Data = BitConverter.GetBytes(_e1);
+
+ byte[] data = new byte[16];
+
+ Buffer.BlockCopy(e0Data, 0, data, 0, 8);
+ Buffer.BlockCopy(e1Data, 0, data, 8, 8);
+
+ return data;
+ }
+
+ public override int GetHashCode()
+ {
+ return HashCode.Combine(_e0, _e1);
+ }
+
+ public static bool operator ==(SimdValue x, SimdValue y)
+ {
+ return x.Equals(y);
+ }
+
+ public static bool operator !=(SimdValue x, SimdValue y)
+ {
+ return !x.Equals(y);
+ }
+
+ public override bool Equals(object obj)
+ {
+ return obj is SimdValue vector && Equals(vector);
+ }
+
+ public bool Equals(SimdValue other)
+ {
+ return other._e0 == _e0 && other._e1 == _e1;
+ }
+
+ public override string ToString()
+ {
+ return $"0x{_e1:X16}{_e0:X16}";
+ }
+ }
+} \ No newline at end of file
diff --git a/src/Ryujinx.Tests.Unicorn/UnicornAArch32.cs b/src/Ryujinx.Tests.Unicorn/UnicornAArch32.cs
new file mode 100644
index 00000000..a095e664
--- /dev/null
+++ b/src/Ryujinx.Tests.Unicorn/UnicornAArch32.cs
@@ -0,0 +1,283 @@
+using System;
+using UnicornEngine.Const;
+
+namespace Ryujinx.Tests.Unicorn
+{
+ public class UnicornAArch32 : IDisposable
+ {
+ internal readonly UnicornEngine.Unicorn uc;
+ private bool _isDisposed;
+
+ public IndexedProperty<int, uint> R => new(GetX, SetX);
+
+ public IndexedProperty<int, SimdValue> Q => new(GetQ, SetQ);
+
+ public uint LR
+ {
+ get => GetRegister(Arm.UC_ARM_REG_LR);
+ set => SetRegister(Arm.UC_ARM_REG_LR, value);
+ }
+
+ public uint SP
+ {
+ get => GetRegister(Arm.UC_ARM_REG_SP);
+ set => SetRegister(Arm.UC_ARM_REG_SP, value);
+ }
+
+ public uint PC
+ {
+ get => GetRegister(Arm.UC_ARM_REG_PC) & 0xfffffffeu;
+ set => SetRegister(Arm.UC_ARM_REG_PC, (value & 0xfffffffeu) | (ThumbFlag ? 1u : 0u));
+ }
+
+ public uint CPSR
+ {
+ get => GetRegister(Arm.UC_ARM_REG_CPSR);
+ set => SetRegister(Arm.UC_ARM_REG_CPSR, value);
+ }
+
+ public int Fpscr
+ {
+ get => (int)GetRegister(Arm.UC_ARM_REG_FPSCR) | ((int)GetRegister(Arm.UC_ARM_REG_FPSCR_NZCV));
+ set => SetRegister(Arm.UC_ARM_REG_FPSCR, (uint)value);
+ }
+
+ public bool QFlag
+ {
+ get => (CPSR & 0x8000000u) != 0;
+ set => CPSR = (CPSR & ~0x8000000u) | (value ? 0x8000000u : 0u);
+ }
+
+ public bool OverflowFlag
+ {
+ get => (CPSR & 0x10000000u) != 0;
+ set => CPSR = (CPSR & ~0x10000000u) | (value ? 0x10000000u : 0u);
+ }
+
+ public bool CarryFlag
+ {
+ get => (CPSR & 0x20000000u) != 0;
+ set => CPSR = (CPSR & ~0x20000000u) | (value ? 0x20000000u : 0u);
+ }
+
+ public bool ZeroFlag
+ {
+ get => (CPSR & 0x40000000u) != 0;
+ set => CPSR = (CPSR & ~0x40000000u) | (value ? 0x40000000u : 0u);
+ }
+
+ public bool NegativeFlag
+ {
+ get => (CPSR & 0x80000000u) != 0;
+ set => CPSR = (CPSR & ~0x80000000u) | (value ? 0x80000000u : 0u);
+ }
+
+ public bool ThumbFlag
+ {
+ get => (CPSR & 0x00000020u) != 0;
+ set
+ {
+ CPSR = (CPSR & ~0x00000020u) | (value ? 0x00000020u : 0u);
+ SetRegister(Arm.UC_ARM_REG_PC, (GetRegister(Arm.UC_ARM_REG_PC) & 0xfffffffeu) | (value ? 1u : 0u));
+ }
+ }
+
+ public UnicornAArch32()
+ {
+ uc = new UnicornEngine.Unicorn(Common.UC_ARCH_ARM, Common.UC_MODE_LITTLE_ENDIAN);
+
+ SetRegister(Arm.UC_ARM_REG_C1_C0_2, GetRegister(Arm.UC_ARM_REG_C1_C0_2) | 0xf00000);
+ SetRegister(Arm.UC_ARM_REG_FPEXC, 0x40000000);
+ }
+
+ ~UnicornAArch32()
+ {
+ Dispose(false);
+ }
+
+ public void Dispose()
+ {
+ Dispose(true);
+ GC.SuppressFinalize(this);
+ }
+
+ protected virtual void Dispose(bool disposing)
+ {
+ if (!_isDisposed)
+ {
+ uc.Close();
+ _isDisposed = true;
+ }
+ }
+
+ public void RunForCount(ulong count)
+ {
+ // FIXME: untilAddr should be 0xFFFFFFFFFFFFFFFFu
+ uc.EmuStart(this.PC, -1, 0, (long)count);
+ }
+
+ public void Step()
+ {
+ RunForCount(1);
+ }
+
+ private static int[] XRegisters =
+ {
+ Arm.UC_ARM_REG_R0,
+ Arm.UC_ARM_REG_R1,
+ Arm.UC_ARM_REG_R2,
+ Arm.UC_ARM_REG_R3,
+ Arm.UC_ARM_REG_R4,
+ Arm.UC_ARM_REG_R5,
+ Arm.UC_ARM_REG_R6,
+ Arm.UC_ARM_REG_R7,
+ Arm.UC_ARM_REG_R8,
+ Arm.UC_ARM_REG_R9,
+ Arm.UC_ARM_REG_R10,
+ Arm.UC_ARM_REG_R11,
+ Arm.UC_ARM_REG_R12,
+ Arm.UC_ARM_REG_R13,
+ Arm.UC_ARM_REG_R14,
+ Arm.UC_ARM_REG_R15,
+ };
+
+ private static int[] QRegisters =
+ {
+ Arm.UC_ARM_REG_Q0,
+ Arm.UC_ARM_REG_Q1,
+ Arm.UC_ARM_REG_Q2,
+ Arm.UC_ARM_REG_Q3,
+ Arm.UC_ARM_REG_Q4,
+ Arm.UC_ARM_REG_Q5,
+ Arm.UC_ARM_REG_Q6,
+ Arm.UC_ARM_REG_Q7,
+ Arm.UC_ARM_REG_Q8,
+ Arm.UC_ARM_REG_Q9,
+ Arm.UC_ARM_REG_Q10,
+ Arm.UC_ARM_REG_Q11,
+ Arm.UC_ARM_REG_Q12,
+ Arm.UC_ARM_REG_Q13,
+ Arm.UC_ARM_REG_Q14,
+ Arm.UC_ARM_REG_Q15
+ };
+
+ public uint GetX(int index)
+ {
+ if ((uint)index > 15)
+ {
+ throw new ArgumentOutOfRangeException(nameof(index));
+ }
+
+ return GetRegister(XRegisters[index]);
+ }
+
+ public void SetX(int index, uint value)
+ {
+ if ((uint)index > 15)
+ {
+ throw new ArgumentOutOfRangeException(nameof(index));
+ }
+
+ SetRegister(XRegisters[index], value);
+ }
+
+ public SimdValue GetQ(int index)
+ {
+ if ((uint)index > 15)
+ {
+ throw new ArgumentOutOfRangeException(nameof(index));
+ }
+
+ // Getting quadword registers from Unicorn A32 seems to be broken, so we combine its 2 doubleword registers instead.
+ return GetVector(Arm.UC_ARM_REG_D0 + index * 2);
+ }
+
+ public void SetQ(int index, SimdValue value)
+ {
+ if ((uint)index > 15)
+ {
+ throw new ArgumentOutOfRangeException(nameof(index));
+ }
+
+ SetVector(Arm.UC_ARM_REG_D0 + index * 2, value);
+ }
+
+ public uint GetRegister(int register)
+ {
+ byte[] data = new byte[4];
+
+ uc.RegRead(register, data);
+
+ return BitConverter.ToUInt32(data, 0);
+ }
+
+ public void SetRegister(int register, uint value)
+ {
+ byte[] data = BitConverter.GetBytes(value);
+
+ uc.RegWrite(register, data);
+ }
+
+ public SimdValue GetVector(int register)
+ {
+ byte[] data = new byte[8];
+
+ uc.RegRead(register, data);
+ ulong lo = BitConverter.ToUInt64(data, 0);
+ uc.RegRead(register + 1, data);
+ ulong hi = BitConverter.ToUInt64(data, 0);
+
+ return new SimdValue(lo, hi);
+ }
+
+ private void SetVector(int register, SimdValue value)
+ {
+ byte[] data = BitConverter.GetBytes(value.GetUInt64(0));
+ uc.RegWrite(register, data);
+ data = BitConverter.GetBytes(value.GetUInt64(1));
+ uc.RegWrite(register + 1, data);
+ }
+
+ public byte[] MemoryRead(ulong address, ulong size)
+ {
+ byte[] value = new byte[size];
+
+ uc.MemRead((long)address, value);
+
+ return value;
+ }
+
+ public byte MemoryRead8(ulong address) => MemoryRead(address, 1)[0];
+ public ushort MemoryRead16(ulong address) => BitConverter.ToUInt16(MemoryRead(address, 2), 0);
+ public uint MemoryRead32(ulong address) => BitConverter.ToUInt32(MemoryRead(address, 4), 0);
+ public ulong MemoryRead64(ulong address) => BitConverter.ToUInt64(MemoryRead(address, 8), 0);
+
+ public void MemoryWrite(ulong address, byte[] value)
+ {
+ uc.MemWrite((long)address, value);
+ }
+
+ public void MemoryWrite8(ulong address, byte value) => MemoryWrite(address, new[] { value });
+ public void MemoryWrite16(ulong address, short value) => MemoryWrite(address, BitConverter.GetBytes(value));
+ public void MemoryWrite16(ulong address, ushort value) => MemoryWrite(address, BitConverter.GetBytes(value));
+ public void MemoryWrite32(ulong address, int value) => MemoryWrite(address, BitConverter.GetBytes(value));
+ public void MemoryWrite32(ulong address, uint value) => MemoryWrite(address, BitConverter.GetBytes(value));
+ public void MemoryWrite64(ulong address, long value) => MemoryWrite(address, BitConverter.GetBytes(value));
+ public void MemoryWrite64(ulong address, ulong value) => MemoryWrite(address, BitConverter.GetBytes(value));
+
+ public void MemoryMap(ulong address, ulong size, MemoryPermission permissions)
+ {
+ uc.MemMap((long)address, (long)size, (int)permissions);
+ }
+
+ public void MemoryUnmap(ulong address, ulong size)
+ {
+ uc.MemUnmap((long)address, (long)size);
+ }
+
+ public void MemoryProtect(ulong address, ulong size, MemoryPermission permissions)
+ {
+ uc.MemProtect((long)address, (long)size, (int)permissions);
+ }
+ }
+} \ No newline at end of file
diff --git a/src/Ryujinx.Tests.Unicorn/UnicornAArch64.cs b/src/Ryujinx.Tests.Unicorn/UnicornAArch64.cs
new file mode 100644
index 00000000..16dfd93b
--- /dev/null
+++ b/src/Ryujinx.Tests.Unicorn/UnicornAArch64.cs
@@ -0,0 +1,298 @@
+using System;
+using UnicornEngine.Const;
+
+namespace Ryujinx.Tests.Unicorn
+{
+ public class UnicornAArch64 : IDisposable
+ {
+ internal readonly UnicornEngine.Unicorn uc;
+ private bool _isDisposed;
+
+ public IndexedProperty<int, ulong> X => new(GetX, SetX);
+
+ public IndexedProperty<int, SimdValue> Q => new(GetQ, SetQ);
+
+ public ulong LR
+ {
+ get => GetRegister(Arm64.UC_ARM64_REG_LR);
+ set => SetRegister(Arm64.UC_ARM64_REG_LR, value);
+ }
+
+ public ulong SP
+ {
+ get => GetRegister(Arm64.UC_ARM64_REG_SP);
+ set => SetRegister(Arm64.UC_ARM64_REG_SP, value);
+ }
+
+ public ulong PC
+ {
+ get => GetRegister(Arm64.UC_ARM64_REG_PC);
+ set => SetRegister(Arm64.UC_ARM64_REG_PC, value);
+ }
+
+ public uint Pstate
+ {
+ get => (uint)GetRegister(Arm64.UC_ARM64_REG_PSTATE);
+ set => SetRegister(Arm64.UC_ARM64_REG_PSTATE, value);
+ }
+
+ public int Fpcr
+ {
+ get => (int)GetRegister(Arm64.UC_ARM64_REG_FPCR);
+ set => SetRegister(Arm64.UC_ARM64_REG_FPCR, (uint)value);
+ }
+
+ public int Fpsr
+ {
+ get => (int)GetRegister(Arm64.UC_ARM64_REG_FPSR);
+ set => SetRegister(Arm64.UC_ARM64_REG_FPSR, (uint)value);
+ }
+
+ public bool OverflowFlag
+ {
+ get => (Pstate & 0x10000000u) != 0;
+ set => Pstate = (Pstate & ~0x10000000u) | (value ? 0x10000000u : 0u);
+ }
+
+ public bool CarryFlag
+ {
+ get => (Pstate & 0x20000000u) != 0;
+ set => Pstate = (Pstate & ~0x20000000u) | (value ? 0x20000000u : 0u);
+ }
+
+ public bool ZeroFlag
+ {
+ get => (Pstate & 0x40000000u) != 0;
+ set => Pstate = (Pstate & ~0x40000000u) | (value ? 0x40000000u : 0u);
+ }
+
+ public bool NegativeFlag
+ {
+ get => (Pstate & 0x80000000u) != 0;
+ set => Pstate = (Pstate & ~0x80000000u) | (value ? 0x80000000u : 0u);
+ }
+
+ public UnicornAArch64()
+ {
+ uc = new UnicornEngine.Unicorn(Common.UC_ARCH_ARM64, Common.UC_MODE_LITTLE_ENDIAN);
+
+ SetRegister(Arm64.UC_ARM64_REG_CPACR_EL1, 0x00300000);
+ }
+
+ ~UnicornAArch64()
+ {
+ Dispose(false);
+ }
+
+ public void Dispose()
+ {
+ Dispose(true);
+ GC.SuppressFinalize(this);
+ }
+
+ protected virtual void Dispose(bool disposing)
+ {
+ if (!_isDisposed)
+ {
+ uc.Close();
+ _isDisposed = true;
+ }
+ }
+
+ public void RunForCount(ulong count)
+ {
+ // FIXME: untilAddr should be 0xFFFFFFFFFFFFFFFFul
+ uc.EmuStart((long)this.PC, -1, 0, (long)count);
+ }
+
+ public void Step()
+ {
+ RunForCount(1);
+ }
+
+ private static int[] XRegisters =
+ {
+ Arm64.UC_ARM64_REG_X0,
+ Arm64.UC_ARM64_REG_X1,
+ Arm64.UC_ARM64_REG_X2,
+ Arm64.UC_ARM64_REG_X3,
+ Arm64.UC_ARM64_REG_X4,
+ Arm64.UC_ARM64_REG_X5,
+ Arm64.UC_ARM64_REG_X6,
+ Arm64.UC_ARM64_REG_X7,
+ Arm64.UC_ARM64_REG_X8,
+ Arm64.UC_ARM64_REG_X9,
+ Arm64.UC_ARM64_REG_X10,
+ Arm64.UC_ARM64_REG_X11,
+ Arm64.UC_ARM64_REG_X12,
+ Arm64.UC_ARM64_REG_X13,
+ Arm64.UC_ARM64_REG_X14,
+ Arm64.UC_ARM64_REG_X15,
+ Arm64.UC_ARM64_REG_X16,
+ Arm64.UC_ARM64_REG_X17,
+ Arm64.UC_ARM64_REG_X18,
+ Arm64.UC_ARM64_REG_X19,
+ Arm64.UC_ARM64_REG_X20,
+ Arm64.UC_ARM64_REG_X21,
+ Arm64.UC_ARM64_REG_X22,
+ Arm64.UC_ARM64_REG_X23,
+ Arm64.UC_ARM64_REG_X24,
+ Arm64.UC_ARM64_REG_X25,
+ Arm64.UC_ARM64_REG_X26,
+ Arm64.UC_ARM64_REG_X27,
+ Arm64.UC_ARM64_REG_X28,
+ Arm64.UC_ARM64_REG_X29,
+ Arm64.UC_ARM64_REG_X30,
+ };
+
+ private static int[] QRegisters =
+ {
+ Arm64.UC_ARM64_REG_Q0,
+ Arm64.UC_ARM64_REG_Q1,
+ Arm64.UC_ARM64_REG_Q2,
+ Arm64.UC_ARM64_REG_Q3,
+ Arm64.UC_ARM64_REG_Q4,
+ Arm64.UC_ARM64_REG_Q5,
+ Arm64.UC_ARM64_REG_Q6,
+ Arm64.UC_ARM64_REG_Q7,
+ Arm64.UC_ARM64_REG_Q8,
+ Arm64.UC_ARM64_REG_Q9,
+ Arm64.UC_ARM64_REG_Q10,
+ Arm64.UC_ARM64_REG_Q11,
+ Arm64.UC_ARM64_REG_Q12,
+ Arm64.UC_ARM64_REG_Q13,
+ Arm64.UC_ARM64_REG_Q14,
+ Arm64.UC_ARM64_REG_Q15,
+ Arm64.UC_ARM64_REG_Q16,
+ Arm64.UC_ARM64_REG_Q17,
+ Arm64.UC_ARM64_REG_Q18,
+ Arm64.UC_ARM64_REG_Q19,
+ Arm64.UC_ARM64_REG_Q20,
+ Arm64.UC_ARM64_REG_Q21,
+ Arm64.UC_ARM64_REG_Q22,
+ Arm64.UC_ARM64_REG_Q23,
+ Arm64.UC_ARM64_REG_Q24,
+ Arm64.UC_ARM64_REG_Q25,
+ Arm64.UC_ARM64_REG_Q26,
+ Arm64.UC_ARM64_REG_Q27,
+ Arm64.UC_ARM64_REG_Q28,
+ Arm64.UC_ARM64_REG_Q29,
+ Arm64.UC_ARM64_REG_Q30,
+ Arm64.UC_ARM64_REG_Q31,
+ };
+
+ public ulong GetX(int index)
+ {
+ if ((uint)index > 30)
+ {
+ throw new ArgumentOutOfRangeException(nameof(index));
+ }
+
+ return GetRegister(XRegisters[index]);
+ }
+
+ public void SetX(int index, ulong value)
+ {
+ if ((uint)index > 30)
+ {
+ throw new ArgumentOutOfRangeException(nameof(index));
+ }
+
+ SetRegister(XRegisters[index], value);
+ }
+
+ public SimdValue GetQ(int index)
+ {
+ if ((uint)index > 31)
+ {
+ throw new ArgumentOutOfRangeException(nameof(index));
+ }
+
+ return GetVector(QRegisters[index]);
+ }
+
+ public void SetQ(int index, SimdValue value)
+ {
+ if ((uint)index > 31)
+ {
+ throw new ArgumentOutOfRangeException(nameof(index));
+ }
+
+ SetVector(QRegisters[index], value);
+ }
+
+ private ulong GetRegister(int register)
+ {
+ byte[] data = new byte[8];
+
+ uc.RegRead(register, data);
+
+ return BitConverter.ToUInt64(data, 0);
+ }
+
+ private void SetRegister(int register, ulong value)
+ {
+ byte[] data = BitConverter.GetBytes(value);
+
+ uc.RegWrite(register, data);
+ }
+
+ private SimdValue GetVector(int register)
+ {
+ byte[] data = new byte[16];
+
+ uc.RegRead(register, data);
+
+ return new SimdValue(data);
+ }
+
+ private void SetVector(int register, SimdValue value)
+ {
+ byte[] data = value.ToArray();
+
+ uc.RegWrite(register, data);
+ }
+
+ public byte[] MemoryRead(ulong address, ulong size)
+ {
+ byte[] value = new byte[size];
+
+ uc.MemRead((long)address, value);
+
+ return value;
+ }
+
+ public byte MemoryRead8 (ulong address) => MemoryRead(address, 1)[0];
+ public ushort MemoryRead16(ulong address) => BitConverter.ToUInt16(MemoryRead(address, 2), 0);
+ public uint MemoryRead32(ulong address) => BitConverter.ToUInt32(MemoryRead(address, 4), 0);
+ public ulong MemoryRead64(ulong address) => BitConverter.ToUInt64(MemoryRead(address, 8), 0);
+
+ public void MemoryWrite(ulong address, byte[] value)
+ {
+ uc.MemWrite((long)address, value);
+ }
+
+ public void MemoryWrite8 (ulong address, byte value) => MemoryWrite(address, new[]{ value });
+ public void MemoryWrite16(ulong address, short value) => MemoryWrite(address, BitConverter.GetBytes(value));
+ public void MemoryWrite16(ulong address, ushort value) => MemoryWrite(address, BitConverter.GetBytes(value));
+ public void MemoryWrite32(ulong address, int value) => MemoryWrite(address, BitConverter.GetBytes(value));
+ public void MemoryWrite32(ulong address, uint value) => MemoryWrite(address, BitConverter.GetBytes(value));
+ public void MemoryWrite64(ulong address, long value) => MemoryWrite(address, BitConverter.GetBytes(value));
+ public void MemoryWrite64(ulong address, ulong value) => MemoryWrite(address, BitConverter.GetBytes(value));
+
+ public void MemoryMap(ulong address, ulong size, MemoryPermission permissions)
+ {
+ uc.MemMap((long)address, (long)size, (int)permissions);
+ }
+
+ public void MemoryUnmap(ulong address, ulong size)
+ {
+ uc.MemUnmap((long)address, (long)size);
+ }
+
+ public void MemoryProtect(ulong address, ulong size, MemoryPermission permissions)
+ {
+ uc.MemProtect((long)address, (long)size, (int)permissions);
+ }
+ }
+} \ No newline at end of file