Implement a new JIT for Arm devices (#6057)

* Implement a new JIT for Arm devices

* Auto-format

* Make a lot of Assembler members read-only

* More read-only

* Fix more warnings

* ObjectDisposedException.ThrowIf

* New JIT cache for platforms that enforce W^X, currently unused

* Remove unused using

* Fix assert

* Pass memory manager type around

* Safe memory manager mode support + other improvements

* Actual safe memory manager mode masking support

* PR feedback

1 files changed, 65 insertions, 0 deletions

diff --git a/src/Ryujinx.Cpu/LightningJit/IsaFeature.cs b/src/Ryujinx.Cpu/LightningJit/IsaFeature.cs
new file mode 100644
index 00000000..c1f799d2
--- /dev/null
+++ b/src/Ryujinx.Cpu/LightningJit/IsaFeature.cs
@@ -0,0 +1,65 @@
+using System;
+
+namespace Ryujinx.Cpu.LightningJit
+{
+    [Flags]
+    public enum IsaFeature : ulong
+    {
+        None = 0,
+        FeatAa32bf16 = 1UL << 0,
+        FeatAa32i8mm = 1UL << 1,
+        FeatAes = 1UL << 2,
+        FeatBf16 = 1UL << 3,
+        FeatBti = 1UL << 4,
+        FeatChk = 1UL << 5,
+        FeatClrbhb = 1UL << 6,
+        FeatCrc32 = 1UL << 7,
+        FeatCssc = 1UL << 8,
+        FeatD128 = 1UL << 9,
+        FeatDgh = 1UL << 10,
+        FeatDotprod = 1UL << 11,
+        FeatFcma = 1UL << 12,
+        FeatFhm = 1UL << 13,
+        FeatFlagm = 1UL << 14,
+        FeatFlagm2 = 1UL << 15,
+        FeatFp16 = 1UL << 16,
+        FeatFrintts = 1UL << 17,
+        FeatGcs = 1UL << 18,
+        FeatHbc = 1UL << 19,
+        FeatI8mm = 1UL << 20,
+        FeatJscvt = 1UL << 21,
+        FeatLor = 1UL << 22,
+        FeatLrcpc = 1UL << 23,
+        FeatLrcpc2 = 1UL << 24,
+        FeatLrcpc3 = 1UL << 25,
+        FeatLs64 = 1UL << 26,
+        FeatLs64Accdata = 1UL << 27,
+        FeatLs64V = 1UL << 28,
+        FeatLse = 1UL << 29,
+        FeatLse128 = 1UL << 30,
+        FeatMops = 1UL << 31,
+        FeatMte = 1UL << 32,
+        FeatMte2 = 1UL << 33,
+        FeatPan = 1UL << 34,
+        FeatPauth = 1UL << 35,
+        FeatPmull = 1UL << 36,
+        FeatRas = 1UL << 37,
+        FeatRdm = 1UL << 38,
+        FeatRprfm = 1UL << 39,
+        FeatSb = 1UL << 40,
+        FeatSha1 = 1UL << 41,
+        FeatSha256 = 1UL << 42,
+        FeatSha3 = 1UL << 43,
+        FeatSha512 = 1UL << 44,
+        FeatSm3 = 1UL << 45,
+        FeatSm4 = 1UL << 46,
+        FeatSpe = 1UL << 47,
+        FeatSysinstr128 = 1UL << 48,
+        FeatSysreg128 = 1UL << 49,
+        FeatThe = 1UL << 50,
+        FeatTme = 1UL << 51,
+        FeatTrf = 1UL << 52,
+        FeatWfxt = 1UL << 53,
+        FeatXs = 1UL << 54,
+    }
+}