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authorgdkchan <gab.dark.100@gmail.com>2024-01-20 11:11:28 -0300
committerGitHub <noreply@github.com>2024-01-20 11:11:28 -0300
commit427b7d06b5ab6d2b06784a9d283eaf836a04c27e (patch)
treeb69b500432626c89f6a4b7171a948b46c46b3723 /src/Ryujinx.Cpu/LightningJit/CodeGen/Arm64/AbiConstants.cs
parent331c07807fd0db5d4452d6ef02962a6d19a56d7f (diff)
Implement a new JIT for Arm devices (#6057)
* Implement a new JIT for Arm devices * Auto-format * Make a lot of Assembler members read-only * More read-only * Fix more warnings * ObjectDisposedException.ThrowIf * New JIT cache for platforms that enforce W^X, currently unused * Remove unused using * Fix assert * Pass memory manager type around * Safe memory manager mode support + other improvements * Actual safe memory manager mode masking support * PR feedback
Diffstat (limited to 'src/Ryujinx.Cpu/LightningJit/CodeGen/Arm64/AbiConstants.cs')
-rw-r--r--src/Ryujinx.Cpu/LightningJit/CodeGen/Arm64/AbiConstants.cs15
1 files changed, 15 insertions, 0 deletions
diff --git a/src/Ryujinx.Cpu/LightningJit/CodeGen/Arm64/AbiConstants.cs b/src/Ryujinx.Cpu/LightningJit/CodeGen/Arm64/AbiConstants.cs
new file mode 100644
index 00000000..24a646ca
--- /dev/null
+++ b/src/Ryujinx.Cpu/LightningJit/CodeGen/Arm64/AbiConstants.cs
@@ -0,0 +1,15 @@
+namespace Ryujinx.Cpu.LightningJit.CodeGen.Arm64
+{
+ static class AbiConstants
+ {
+ // Some of those register have specific roles and can't be used as general purpose registers.
+ // X18 - Reserved for platform specific usage.
+ // X29 - Frame pointer.
+ // X30 - Return address.
+ // X31 - Not an actual register, in some cases maps to SP, and in others to ZR.
+ public const uint ReservedRegsMask = (1u << 18) | (1u << 29) | (1u << 30) | (1u << 31);
+
+ public const uint GprCalleeSavedRegsMask = 0x1ff80000; // X19 to X28
+ public const uint FpSimdCalleeSavedRegsMask = 0xff00; // D8 to D15
+ }
+}