Implement a new JIT for Arm devices (#6057)

* Implement a new JIT for Arm devices

* Auto-format

* Make a lot of Assembler members read-only

* More read-only

* Fix more warnings

* ObjectDisposedException.ThrowIf

* New JIT cache for platforms that enforce W^X, currently unused

* Remove unused using

* Fix assert

* Pass memory manager type around

* Safe memory manager mode support + other improvements

* Actual safe memory manager mode masking support

* PR feedback

1 files changed, 95 insertions, 0 deletions

diff --git a/src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitVfpArithmetic.cs b/src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitVfpArithmetic.cs
new file mode 100644
index 00000000..efb2fc6b
--- /dev/null
+++ b/src/Ryujinx.Cpu/LightningJit/Arm32/Target/Arm64/InstEmitVfpArithmetic.cs
@@ -0,0 +1,95 @@
+namespace Ryujinx.Cpu.LightningJit.Arm32.Target.Arm64
+{
+    static class InstEmitVfpArithmetic
+    {
+        public static void VabsF(CodeGenContext context, uint rd, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarUnaryF(context, rd, rm, size, context.Arm64Assembler.FabsFloat);
+        }
+
+        public static void VaddF(CodeGenContext context, uint rd, uint rn, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarBinaryF(context, rd, rn, rm, size, context.Arm64Assembler.FaddFloat);
+        }
+
+        public static void VdivF(CodeGenContext context, uint rd, uint rn, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarBinaryF(context, rd, rn, rm, size, context.Arm64Assembler.FdivFloat);
+        }
+
+        public static void VfmaF(CodeGenContext context, uint rd, uint rn, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarTernaryRdF(context, rd, rn, rm, size, context.Arm64Assembler.FmaddFloat);
+        }
+
+        public static void VfmsF(CodeGenContext context, uint rd, uint rn, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarTernaryRdF(context, rd, rn, rm, size, context.Arm64Assembler.FmsubFloat);
+        }
+
+        public static void VfnmaF(CodeGenContext context, uint rd, uint rn, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarTernaryRdF(context, rd, rn, rm, size, context.Arm64Assembler.FnmaddFloat);
+        }
+
+        public static void VfnmsF(CodeGenContext context, uint rd, uint rn, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarTernaryRdF(context, rd, rn, rm, size, context.Arm64Assembler.FnmsubFloat);
+        }
+
+        public static void Vmaxnm(CodeGenContext context, uint rd, uint rn, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarBinaryF(context, rd, rn, rm, size, context.Arm64Assembler.FmaxnmFloat);
+        }
+
+        public static void Vminnm(CodeGenContext context, uint rd, uint rn, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarBinaryF(context, rd, rn, rm, size, context.Arm64Assembler.FminnmFloat);
+        }
+
+        public static void VmlaF(CodeGenContext context, uint rd, uint rn, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarTernaryMulNegRdF(context, rd, rn, rm, size, negD: false, negProduct: false);
+        }
+
+        public static void VmlsF(CodeGenContext context, uint rd, uint rn, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarTernaryMulNegRdF(context, rd, rn, rm, size, negD: false, negProduct: true);
+        }
+
+        public static void VmulF(CodeGenContext context, uint rd, uint rn, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarBinaryF(context, rd, rn, rm, size, context.Arm64Assembler.FmulFloat);
+        }
+
+        public static void VnegF(CodeGenContext context, uint rd, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarUnaryF(context, rd, rm, size, context.Arm64Assembler.FnegFloat);
+        }
+
+        public static void VnmlaF(CodeGenContext context, uint rd, uint rn, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarTernaryMulNegRdF(context, rd, rn, rm, size, negD: true, negProduct: true);
+        }
+
+        public static void VnmlsF(CodeGenContext context, uint rd, uint rn, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarTernaryMulNegRdF(context, rd, rn, rm, size, negD: true, negProduct: false);
+        }
+
+        public static void VnmulF(CodeGenContext context, uint rd, uint rn, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarBinaryF(context, rd, rn, rm, size, context.Arm64Assembler.FnmulFloat);
+        }
+
+        public static void VsqrtF(CodeGenContext context, uint rd, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarUnaryF(context, rd, rm, size, context.Arm64Assembler.FsqrtFloat);
+        }
+
+        public static void VsubF(CodeGenContext context, uint rd, uint rn, uint rm, uint size)
+        {
+            InstEmitNeonCommon.EmitScalarBinaryF(context, rd, rn, rm, size, context.Arm64Assembler.FsubFloat);
+        }
+    }
+}