[ARMeilleure] Address dotnet-format issues (#5357)

* dotnet format style --severity info

Some changes were manually reverted.

* dotnet format analyzers --serverity info

Some changes have been minimally adapted.

* Restore a few unused methods and variables

* Silence dotnet format IDE0060 warnings

* Silence dotnet format IDE0052 warnings

* Address or silence dotnet format IDE1006 warnings

* Address or silence dotnet format CA2208 warnings

* Address dotnet format CA1822 warnings

* Address or silence dotnet format CA1069 warnings

* Silence CA1806 and CA1834 issues

* Address dotnet format CA1401 warnings

* Fix new dotnet-format issues after rebase

* Address review comments

* Address dotnet format CA2208 warnings properly

* Fix formatting for switch expressions

* Address most dotnet format whitespace warnings

* Apply dotnet format whitespace formatting

A few of them have been manually reverted and the corresponding warning was silenced

* Add previously silenced warnings back

I have no clue how these disappeared

* Revert formatting changes for OpCodeTable.cs

* Enable formatting for a few cases again

* Format if-blocks correctly

* Enable formatting for a few more cases again

* Fix inline comment alignment

* Run dotnet format after rebase and remove unused usings

- analyzers
- style
- whitespace

* Disable 'prefer switch expression' rule

* Add comments to disabled warnings

* Remove a few unused parameters

* Adjust namespaces

* Simplify properties and array initialization, Use const when possible, Remove trailing commas

* Start working on disabled warnings

* Fix and silence a few dotnet-format warnings again

* Address IDE0251 warnings

* Address a few disabled IDE0060 warnings

* Silence IDE0060 in .editorconfig

* Revert "Simplify properties and array initialization, Use const when possible, Remove trailing commas"

This reverts commit 9462e4136c0a2100dc28b20cf9542e06790aa67e.

* dotnet format whitespace after rebase

* First dotnet format pass

* Remove unnecessary formatting exclusion

* Add unsafe dotnet format changes

* Change visibility of JitSupportDarwin to internal

11 files changed, 91 insertions, 100 deletions

diff --git a/src/ARMeilleure/CodeGen/RegisterAllocators/AllocationResult.cs b/src/ARMeilleure/CodeGen/RegisterAllocators/AllocationResult.cs
index 43e5c7e2..7b9c2f77 100644
--- a/src/ARMeilleure/CodeGen/RegisterAllocators/AllocationResult.cs
+++ b/src/ARMeilleure/CodeGen/RegisterAllocators/AllocationResult.cs
@@ -4,7 +4,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
     {
         public int IntUsedRegisters { get; }
         public int VecUsedRegisters { get; }
-        public int SpillRegionSize  { get; }
+        public int SpillRegionSize { get; }
 
         public AllocationResult(
             int intUsedRegisters,
@@ -13,7 +13,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
         {
             IntUsedRegisters = intUsedRegisters;
             VecUsedRegisters = vecUsedRegisters;
-            SpillRegionSize  = spillRegionSize;
+            SpillRegionSize = spillRegionSize;
         }
     }
-}
\ No newline at end of file
+}
diff --git a/src/ARMeilleure/CodeGen/RegisterAllocators/CopyResolver.cs b/src/ARMeilleure/CodeGen/RegisterAllocators/CopyResolver.cs
index 587b1a02..af10330b 100644
--- a/src/ARMeilleure/CodeGen/RegisterAllocators/CopyResolver.cs
+++ b/src/ARMeilleure/CodeGen/RegisterAllocators/CopyResolver.cs
@@ -1,7 +1,6 @@
 using ARMeilleure.IntermediateRepresentation;
 using System;
 using System.Collections.Generic;
-
 using static ARMeilleure.IntermediateRepresentation.Operand.Factory;
 using static ARMeilleure.IntermediateRepresentation.Operation.Factory;
 
@@ -13,16 +12,16 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
         {
             private readonly struct Copy
             {
-                public Register Dest   { get; }
+                public Register Dest { get; }
                 public Register Source { get; }
 
                 public OperandType Type { get; }
 
                 public Copy(Register dest, Register source, OperandType type)
                 {
-                    Dest   = dest;
+                    Dest = dest;
                     Source = source;
-                    Type   = type;
+                    Type = type;
                 }
             }
 
@@ -42,19 +41,19 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
             public void Sequence(List<Operation> sequence)
             {
-                Dictionary<Register, Register> locations = new Dictionary<Register, Register>();
-                Dictionary<Register, Register> sources   = new Dictionary<Register, Register>();
+                Dictionary<Register, Register> locations = new();
+                Dictionary<Register, Register> sources = new();
 
-                Dictionary<Register, OperandType> types = new Dictionary<Register, OperandType>();
+                Dictionary<Register, OperandType> types = new();
 
-                Queue<Register> pendingQueue = new Queue<Register>();
-                Queue<Register> readyQueue   = new Queue<Register>();
+                Queue<Register> pendingQueue = new();
+                Queue<Register> readyQueue = new();
 
                 foreach (Copy copy in _copies)
                 {
                     locations[copy.Source] = copy.Source;
-                    sources[copy.Dest]     = copy.Source;
-                    types[copy.Dest]       = copy.Type;
+                    sources[copy.Dest] = copy.Source;
+                    types[copy.Dest] = copy.Type;
 
                     pendingQueue.Enqueue(copy.Dest);
                 }
@@ -91,7 +90,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                         }
                     }
 
-                    copyDest   = current;
+                    copyDest = current;
                     origSource = sources[copyDest];
                     copySource = locations[origSource];
 
@@ -186,10 +185,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
         private void AddSplitFill(LiveInterval left, LiveInterval right, OperandType type)
         {
-            if (_fillQueue == null)
-            {
-                _fillQueue = new Queue<Operation>();
-            }
+            _fillQueue ??= new Queue<Operation>();
 
             Operand register = GetRegister(right.Register, type);
             Operand offset = Const(left.SpillOffset);
@@ -201,10 +197,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
         private void AddSplitSpill(LiveInterval left, LiveInterval right, OperandType type)
         {
-            if (_spillQueue == null)
-            {
-                _spillQueue = new Queue<Operation>();
-            }
+            _spillQueue ??= new Queue<Operation>();
 
             Operand offset = Const(right.SpillOffset);
             Operand register = GetRegister(left.Register, type);
@@ -216,10 +209,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
         private void AddSplitCopy(LiveInterval left, LiveInterval right, OperandType type)
         {
-            if (_parallelCopy == null)
-            {
-                _parallelCopy = new ParallelCopy();
-            }
+            _parallelCopy ??= new ParallelCopy();
 
             _parallelCopy.AddCopy(right.Register, left.Register, type);
 
@@ -228,7 +218,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
         public Operation[] Sequence()
         {
-            List<Operation> sequence = new List<Operation>();
+            List<Operation> sequence = new();
 
             if (_spillQueue != null)
             {
@@ -256,4 +246,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             return Register(reg.Index, reg.Type, type);
         }
     }
-}
\ No newline at end of file
+}
diff --git a/src/ARMeilleure/CodeGen/RegisterAllocators/HybridAllocator.cs b/src/ARMeilleure/CodeGen/RegisterAllocators/HybridAllocator.cs
index 25952c77..5f1d6ce8 100644
--- a/src/ARMeilleure/CodeGen/RegisterAllocators/HybridAllocator.cs
+++ b/src/ARMeilleure/CodeGen/RegisterAllocators/HybridAllocator.cs
@@ -20,7 +20,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
             public BlockInfo(bool hasCall, int intFixedRegisters, int vecFixedRegisters)
             {
-                HasCall           = hasCall;
+                HasCall = hasCall;
                 IntFixedRegisters = intFixedRegisters;
                 VecFixedRegisters = vecFixedRegisters;
             }
@@ -39,7 +39,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             private int _first;
             private int _last;
 
-            public bool IsBlockLocal => _first == _last;
+            public readonly bool IsBlockLocal => _first == _last;
 
             public LocalInfo(OperandType type, int uses, int blkIndex)
             {
@@ -53,7 +53,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                 SpillOffset = default;
 
                 _first = -1;
-                _last  = -1;
+                _last = -1;
 
                 SetBlockIndex(blkIndex);
             }
@@ -348,17 +348,17 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                                 if (dest.Type.IsInteger())
                                 {
                                     intLocalFreeRegisters &= ~(1 << selectedReg);
-                                    intUsedRegisters      |=   1 << selectedReg;
+                                    intUsedRegisters |= 1 << selectedReg;
                                 }
                                 else
                                 {
                                     vecLocalFreeRegisters &= ~(1 << selectedReg);
-                                    vecUsedRegisters      |=   1 << selectedReg;
+                                    vecUsedRegisters |= 1 << selectedReg;
                                 }
                             }
                             else
                             {
-                                info.Register    = default;
+                                info.Register = default;
                                 info.SpillOffset = Const(stackAlloc.Allocate(dest.Type.GetSizeInBytes()));
                             }
                         }
@@ -382,7 +382,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                                     : GetSpillTemp(dest, vecSpillTempRegisters, ref vecLocalAsg);
 
                                 info.Sequence = sequence;
-                                info.Temp     = temp;
+                                info.Temp = temp;
                             }
 
                             dest = temp;
@@ -408,7 +408,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
         private static int SelectSpillTemps(int mask0, int mask1)
         {
             int selection = 0;
-            int count     = 0;
+            int count = 0;
 
             while (count < MaxIROperands && mask0 != 0)
             {
@@ -451,4 +451,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             return local.AssignmentsCount + local.UsesCount;
         }
     }
-}
\ No newline at end of file
+}
diff --git a/src/ARMeilleure/CodeGen/RegisterAllocators/IRegisterAllocator.cs b/src/ARMeilleure/CodeGen/RegisterAllocators/IRegisterAllocator.cs
index 8f236c25..7d4ce2ea 100644
--- a/src/ARMeilleure/CodeGen/RegisterAllocators/IRegisterAllocator.cs
+++ b/src/ARMeilleure/CodeGen/RegisterAllocators/IRegisterAllocator.cs
@@ -9,4 +9,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             StackAllocator stackAlloc,
             RegisterMasks regMasks);
     }
-}
\ No newline at end of file
+}
diff --git a/src/ARMeilleure/CodeGen/RegisterAllocators/LinearScanAllocator.cs b/src/ARMeilleure/CodeGen/RegisterAllocators/LinearScanAllocator.cs
index d80157af..f156e088 100644
--- a/src/ARMeilleure/CodeGen/RegisterAllocators/LinearScanAllocator.cs
+++ b/src/ARMeilleure/CodeGen/RegisterAllocators/LinearScanAllocator.cs
@@ -14,7 +14,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
     // http://www.christianwimmer.at/Publications/Wimmer04a/Wimmer04a.pdf
     class LinearScanAllocator : IRegisterAllocator
     {
-        private const int InstructionGap     = 2;
+        private const int InstructionGap = 2;
         private const int InstructionGapMask = InstructionGap - 1;
 
         private HashSet<int> _blockEdges;
@@ -33,7 +33,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
             public StackAllocator StackAlloc { get; }
 
-            public BitMap Active   { get; }
+            public BitMap Active { get; }
             public BitMap Inactive { get; }
 
             public int IntUsedRegisters { get; set; }
@@ -47,9 +47,9 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             public AllocationContext(StackAllocator stackAlloc, RegisterMasks masks, int intervalsCount)
             {
                 StackAlloc = stackAlloc;
-                Masks      = masks;
+                Masks = masks;
 
-                Active   = new BitMap(Allocators.Default, intervalsCount);
+                Active = new BitMap(Allocators.Default, intervalsCount);
                 Inactive = new BitMap(Allocators.Default, intervalsCount);
 
                 PopulateFreePositions(RegisterType.Integer, out _intFreePositions, out _intFreePositionsCount);
@@ -443,7 +443,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
                 if (highest < current)
                 {
-                    highest  = current;
+                    highest = current;
                     selected = index;
 
                     if (current == int.MaxValue)
@@ -485,9 +485,9 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
         private void SplitAndSpillOverlappingInterval(
             AllocationContext context,
-            LiveInterval      current,
-            LiveInterval      interval,
-            int               registersCount)
+            LiveInterval current,
+            LiveInterval interval,
+            int registersCount)
         {
             // If there's a next use after the start of the current interval,
             // we need to split the spilled interval twice, and re-insert it
@@ -530,8 +530,8 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
         private void InsertInterval(LiveInterval interval, int registersCount)
         {
             Debug.Assert(interval.UsesCount != 0, "Trying to insert a interval without uses.");
-            Debug.Assert(!interval.IsEmpty,       "Trying to insert a empty interval.");
-            Debug.Assert(!interval.IsSpilled,     "Trying to insert a spilled interval.");
+            Debug.Assert(!interval.IsEmpty, "Trying to insert a empty interval.");
+            Debug.Assert(!interval.IsSpilled, "Trying to insert a spilled interval.");
 
             int startIndex = registersCount * 2;
 
@@ -545,9 +545,9 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             _intervals.Insert(insertIndex, interval);
         }
 
-        private void Spill(AllocationContext context, LiveInterval interval)
+        private static void Spill(AllocationContext context, LiveInterval interval)
         {
-            Debug.Assert(!interval.IsFixed,       "Trying to spill a fixed interval.");
+            Debug.Assert(!interval.IsFixed, "Trying to spill a fixed interval.");
             Debug.Assert(interval.UsesCount == 0, "Trying to spill a interval with uses.");
 
             // We first check if any of the siblings were spilled, if so we can reuse
@@ -561,7 +561,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
         private void InsertSplitCopies()
         {
-            Dictionary<int, CopyResolver> copyResolvers = new Dictionary<int, CopyResolver>();
+            Dictionary<int, CopyResolver> copyResolvers = new();
 
             CopyResolver GetCopyResolver(int position)
             {
@@ -668,18 +668,15 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                             continue;
                         }
 
-                        int lEnd   = _blockRanges[block.Index].End - 1;
+                        int lEnd = _blockRanges[block.Index].End - 1;
                         int rStart = _blockRanges[succIndex].Start;
 
-                        LiveInterval left  = interval.GetSplitChild(lEnd);
+                        LiveInterval left = interval.GetSplitChild(lEnd);
                         LiveInterval right = interval.GetSplitChild(rStart);
 
                         if (left != default && right != default && left != right)
                         {
-                            if (copyResolver == null)
-                            {
-                                copyResolver = new CopyResolver();
-                            }
+                            copyResolver ??= new CopyResolver();
 
                             copyResolver.AddSplit(left, right);
                         }
@@ -856,14 +853,14 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
             int mapSize = _intervals.Count;
 
-            BitMap[] blkLiveGen  = new BitMap[cfg.Blocks.Count];
+            BitMap[] blkLiveGen = new BitMap[cfg.Blocks.Count];
             BitMap[] blkLiveKill = new BitMap[cfg.Blocks.Count];
 
             // Compute local live sets.
             for (BasicBlock block = cfg.Blocks.First; block != null; block = block.ListNext)
             {
-                BitMap liveGen  = new BitMap(Allocators.Default, mapSize);
-                BitMap liveKill = new BitMap(Allocators.Default, mapSize);
+                BitMap liveGen = new(Allocators.Default, mapSize);
+                BitMap liveKill = new(Allocators.Default, mapSize);
 
                 for (Operation node = block.Operations.First; node != default; node = node.ListNext)
                 {
@@ -910,17 +907,17 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                     }
                 }
 
-                blkLiveGen [block.Index] = liveGen;
+                blkLiveGen[block.Index] = liveGen;
                 blkLiveKill[block.Index] = liveKill;
             }
 
             // Compute global live sets.
-            BitMap[] blkLiveIn  = new BitMap[cfg.Blocks.Count];
+            BitMap[] blkLiveIn = new BitMap[cfg.Blocks.Count];
             BitMap[] blkLiveOut = new BitMap[cfg.Blocks.Count];
 
             for (int index = 0; index < cfg.Blocks.Count; index++)
             {
-                blkLiveIn [index] = new BitMap(Allocators.Default, mapSize);
+                blkLiveIn[index] = new BitMap(Allocators.Default, mapSize);
                 blkLiveOut[index] = new BitMap(Allocators.Default, mapSize);
             }
 
@@ -945,9 +942,9 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
                     BitMap liveIn = blkLiveIn[block.Index];
 
-                    liveIn.Set  (liveOut);
+                    liveIn.Set(liveOut);
                     liveIn.Clear(blkLiveKill[block.Index]);
-                    liveIn.Set  (blkLiveGen [block.Index]);
+                    liveIn.Set(blkLiveGen[block.Index]);
                 }
             }
             while (modified);
@@ -969,7 +966,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                 int instCount = Math.Max(block.Operations.Count, 1);
 
                 int blockStart = operationPos - instCount * InstructionGap;
-                int blockEnd   = operationPos;
+                int blockEnd = operationPos;
 
                 _blockRanges[block.Index] = new LiveRange(blockStart, blockEnd);
 
@@ -1061,7 +1058,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             {
                 int regIndex = BitOperations.TrailingZeroCount(mask);
 
-                Register callerSavedReg = new Register(regIndex, regType);
+                Register callerSavedReg = new(regIndex, regType);
 
                 LiveInterval interval = _intervals[GetRegisterId(callerSavedReg)];
 
@@ -1098,4 +1095,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
                    kind == OperandKind.Register;
         }
     }
-}
\ No newline at end of file
+}
diff --git a/src/ARMeilleure/CodeGen/RegisterAllocators/LiveInterval.cs b/src/ARMeilleure/CodeGen/RegisterAllocators/LiveInterval.cs
index d739ad28..333d3951 100644
--- a/src/ARMeilleure/CodeGen/RegisterAllocators/LiveInterval.cs
+++ b/src/ARMeilleure/CodeGen/RegisterAllocators/LiveInterval.cs
@@ -240,8 +240,10 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
         public LiveInterval Split(int position)
         {
-            LiveInterval result = new(Local, Parent);
-            result.End = End;
+            LiveInterval result = new(Local, Parent)
+            {
+                End = End,
+            };
 
             LiveRange prev = PrevRange;
             LiveRange curr = CurrRange;
@@ -393,4 +395,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             return string.Join(", ", GetRanges());
         }
     }
-}
\ No newline at end of file
+}
diff --git a/src/ARMeilleure/CodeGen/RegisterAllocators/LiveIntervalList.cs b/src/ARMeilleure/CodeGen/RegisterAllocators/LiveIntervalList.cs
index 06b979ea..d999d767 100644
--- a/src/ARMeilleure/CodeGen/RegisterAllocators/LiveIntervalList.cs
+++ b/src/ARMeilleure/CodeGen/RegisterAllocators/LiveIntervalList.cs
@@ -8,8 +8,8 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
         private int _count;
         private int _capacity;
 
-        public int Count => _count;
-        public Span<LiveInterval> Span => new(_items, _count);
+        public readonly int Count => _count;
+        public readonly Span<LiveInterval> Span => new(_items, _count);
 
         public void Add(LiveInterval interval)
         {
@@ -37,4 +37,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             _count++;
         }
     }
-}
\ No newline at end of file
+}
diff --git a/src/ARMeilleure/CodeGen/RegisterAllocators/LiveRange.cs b/src/ARMeilleure/CodeGen/RegisterAllocators/LiveRange.cs
index e38b5190..412d597e 100644
--- a/src/ARMeilleure/CodeGen/RegisterAllocators/LiveRange.cs
+++ b/src/ARMeilleure/CodeGen/RegisterAllocators/LiveRange.cs
@@ -71,4 +71,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             return $"[{Start}, {End})";
         }
     }
-}
\ No newline at end of file
+}
diff --git a/src/ARMeilleure/CodeGen/RegisterAllocators/RegisterMasks.cs b/src/ARMeilleure/CodeGen/RegisterAllocators/RegisterMasks.cs
index bc948f95..e6972cf0 100644
--- a/src/ARMeilleure/CodeGen/RegisterAllocators/RegisterMasks.cs
+++ b/src/ARMeilleure/CodeGen/RegisterAllocators/RegisterMasks.cs
@@ -5,8 +5,8 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 {
     readonly struct RegisterMasks
     {
-        public int IntAvailableRegisters   { get; }
-        public int VecAvailableRegisters   { get; }
+        public int IntAvailableRegisters { get; }
+        public int VecAvailableRegisters { get; }
         public int IntCallerSavedRegisters { get; }
         public int VecCallerSavedRegisters { get; }
         public int IntCalleeSavedRegisters { get; }
@@ -22,13 +22,13 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             int vecCalleeSavedRegisters,
             int registersCount)
         {
-            IntAvailableRegisters   = intAvailableRegisters;
-            VecAvailableRegisters   = vecAvailableRegisters;
+            IntAvailableRegisters = intAvailableRegisters;
+            VecAvailableRegisters = vecAvailableRegisters;
             IntCallerSavedRegisters = intCallerSavedRegisters;
             VecCallerSavedRegisters = vecCallerSavedRegisters;
             IntCalleeSavedRegisters = intCalleeSavedRegisters;
             VecCalleeSavedRegisters = vecCalleeSavedRegisters;
-            RegistersCount          = registersCount;
+            RegistersCount = registersCount;
         }
 
         public int GetAvailableRegisters(RegisterType type)
@@ -47,4 +47,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             }
         }
     }
-}
\ No newline at end of file
+}
diff --git a/src/ARMeilleure/CodeGen/RegisterAllocators/StackAllocator.cs b/src/ARMeilleure/CodeGen/RegisterAllocators/StackAllocator.cs
index 038312fe..13995bc8 100644
--- a/src/ARMeilleure/CodeGen/RegisterAllocators/StackAllocator.cs
+++ b/src/ARMeilleure/CodeGen/RegisterAllocators/StackAllocator.cs
@@ -22,4 +22,4 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             return offset;
         }
     }
-}
\ No newline at end of file
+}
diff --git a/src/ARMeilleure/CodeGen/RegisterAllocators/UseList.cs b/src/ARMeilleure/CodeGen/RegisterAllocators/UseList.cs
index c89f0854..a945eccf 100644
--- a/src/ARMeilleure/CodeGen/RegisterAllocators/UseList.cs
+++ b/src/ARMeilleure/CodeGen/RegisterAllocators/UseList.cs
@@ -6,15 +6,15 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
     {
         private int* _items;
         private int _capacity;
-        private int _count;
 
-        public int Count => _count;
-        public int FirstUse => _count > 0 ? _items[_count - 1] : LiveInterval.NotFound;
-        public Span<int> Span => new(_items, _count);
+        public int Count { get; private set; }
+
+        public readonly int FirstUse => Count > 0 ? _items[Count - 1] : LiveInterval.NotFound;
+        public readonly Span<int> Span => new(_items, Count);
 
         public void Add(int position)
         {
-            if (_count + 1 > _capacity)
+            if (Count + 1 > _capacity)
             {
                 var oldSpan = Span;
 
@@ -28,7 +28,7 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
             // Use positions are usually inserted in descending order, so inserting in descending order is faster,
             // since the number of half exchanges is reduced.
-            int i = _count - 1;
+            int i = Count - 1;
 
             while (i >= 0 && _items[i] < position)
             {
@@ -36,19 +36,19 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
             }
 
             _items[i + 1] = position;
-            _count++;
+            Count++;
         }
 
-        public int NextUse(int position)
+        public readonly int NextUse(int position)
         {
             int index = NextUseIndex(position);
 
             return index != LiveInterval.NotFound ? _items[index] : LiveInterval.NotFound;
         }
 
-        public int NextUseIndex(int position)
+        public readonly int NextUseIndex(int position)
         {
-            int i = _count - 1;
+            int i = Count - 1;
 
             if (i == -1 || position > _items[0])
             {
@@ -69,16 +69,18 @@ namespace ARMeilleure.CodeGen.RegisterAllocators
 
             // Since the list is in descending order, the new split list takes the front of the list and the current
             // list takes the back of the list.
-            UseList result = new();
-            result._count = index + 1;
-            result._capacity = result._count;
+            UseList result = new()
+            {
+                Count = index + 1,
+            };
+            result._capacity = result.Count;
             result._items = _items;
 
-            _count = _count - result._count;
-            _capacity = _count;
-            _items = _items + result._count;
+            Count -= result.Count;
+            _capacity = Count;
+            _items += result.Count;
 
             return result;
         }
     }
-}
\ No newline at end of file
+}