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| author | merry <git@mary.rs> | 2022-03-05 18:23:10 +0000 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2022-03-05 15:23:10 -0300 |
| commit | b97ff4da5eb67b68400fa1c187524f53407dbb71 (patch) | |
| tree | 5d4153a53720b9d768139469a39323500687609d /Ryujinx.Tests | |
| parent | 747081d2c79eba176cc64314acdbf5c580537e5e (diff) | |
A32: Fix ALU immediate instructions (#3179)
* Tests: Add A32 tests for immediate ADC/ADCS/RSC/RSCS/SBC/SBCS
* A32: Fix bug in ADC/ADCS/RSC/RSCS/SBC/SBCS
* CpuTestAluImm32: Add more opcodes
* Increment PTC version
Diffstat (limited to 'Ryujinx.Tests')
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestAluImm32.cs | 57 |
1 files changed, 57 insertions, 0 deletions
diff --git a/Ryujinx.Tests/Cpu/CpuTestAluImm32.cs b/Ryujinx.Tests/Cpu/CpuTestAluImm32.cs new file mode 100644 index 00000000..ea5c3b05 --- /dev/null +++ b/Ryujinx.Tests/Cpu/CpuTestAluImm32.cs @@ -0,0 +1,57 @@ +#define AluRs32 + +using NUnit.Framework; +using System.Runtime.CompilerServices; + +namespace Ryujinx.Tests.Cpu +{ + [Category("AluImm32")] + public sealed class CpuTestAluImm32 : CpuTest32 + { +#if AluRs32 + +#region "ValueSource (Opcodes)" + private static uint[] _opcodes() + { + return new uint[] + { + 0xe2a00000u, // ADC R0, R0, #0 + 0xe2b00000u, // ADCS R0, R0, #0 + 0xe2800000u, // ADD R0, R0, #0 + 0xe2900000u, // ADDS R0, R0, #0 + 0xe3c00000u, // BIC R0, R0, #0 + 0xe3d00000u, // BICS R0, R0, #0 + 0xe2600000u, // RSB R0, R0, #0 + 0xe2700000u, // RSBS R0, R0, #0 + 0xe2e00000u, // RSC R0, R0, #0 + 0xe2f00000u, // RSCS R0, R0, #0 + 0xe2c00000u, // SBC R0, R0, #0 + 0xe2d00000u, // SBCS R0, R0, #0 + 0xe2400000u, // SUB R0, R0, #0 + 0xe2500000u, // SUBS R0, R0, #0 + }; + } +#endregion + + private const int RndCnt = 2; + private const int RndCntAmount = 2; + + [Test, Pairwise] + public void TestCpuTestAluImm32([ValueSource("_opcodes")] uint opcode, + [Values(0u, 13u)] uint rd, + [Values(1u, 13u)] uint rn, + [Random(RndCnt)] uint imm, + [Random(RndCnt)] uint wn, + [Values(true, false)] bool carryIn) + { + opcode |= ((imm & 0xfff) << 0) | ((rn & 15) << 16) | ((rd & 15) << 12); + + uint sp = TestContext.CurrentContext.Random.NextUInt(); + + SingleOpcode(opcode, r1: wn, sp: sp, carry: carryIn); + + CompareAgainstUnicorn(); + } +#endif + } +} |