Rename ARegisters to AThreadState

2 files changed, 21 insertions, 21 deletions

diff --git a/Ryujinx.Tests/Cpu/CpuTest.cs b/Ryujinx.Tests/Cpu/CpuTest.cs
index 75d8e6b9..0f1e6413 100644
--- a/Ryujinx.Tests/Cpu/CpuTest.cs
+++ b/Ryujinx.Tests/Cpu/CpuTest.cs
@@ -33,7 +33,7 @@ namespace Ryujinx.Tests.Cpu
         private void Execute(AThread Thread)
         {
             AutoResetEvent Wait = new AutoResetEvent(false);
-            Thread.Registers.Break += (sender, e) => Thread.StopExecution();
+            Thread.ThreadState.Break += (sender, e) => Thread.StopExecution();
             Thread.WorkFinished += (sender, e) => Wait.Set();
 
             Wait.Reset();
@@ -41,23 +41,23 @@ namespace Ryujinx.Tests.Cpu
             Wait.WaitOne();
         }
 
-        private ARegisters SingleOpcode(uint Opcode, 
-                                        ulong X0 = 0, ulong X1 = 0, ulong X2 = 0, 
-                                        AVec V0 = new AVec(), AVec V1 = new AVec(), AVec V2 = new AVec())
+        private AThreadState SingleOpcode(uint Opcode, 
+                                          ulong X0 = 0, ulong X1 = 0, ulong X2 = 0, 
+                                          AVec V0 = new AVec(), AVec V1 = new AVec(), AVec V2 = new AVec())
         {
             Memory.WriteUInt32(0x1000, Opcode);
             Memory.WriteUInt32(0x1004, 0xD4200000); // BRK #0
             Memory.WriteUInt32(0x1008, 0xD65F03C0); // RET
 
             AThread Thread = new AThread(Memory, ThreadPriority.Normal, 0x1000);
-            Thread.Registers.X0 = X0;
-            Thread.Registers.X1 = X1;
-            Thread.Registers.X2 = X2;
-            Thread.Registers.V0 = V0;
-            Thread.Registers.V1 = V1;
-            Thread.Registers.V2 = V2;
+            Thread.ThreadState.X0 = X0;
+            Thread.ThreadState.X1 = X1;
+            Thread.ThreadState.X2 = X2;
+            Thread.ThreadState.V0 = V0;
+            Thread.ThreadState.V1 = V1;
+            Thread.ThreadState.V2 = V2;
             Execute(Thread);
-            return Thread.Registers;
+            return Thread.ThreadState;
         }
 
         [Test]
diff --git a/Ryujinx.Tests/Cpu/CpuTestAlu.cs b/Ryujinx.Tests/Cpu/CpuTestAlu.cs
index 3b82d759..a05c0b19 100644
--- a/Ryujinx.Tests/Cpu/CpuTestAlu.cs
+++ b/Ryujinx.Tests/Cpu/CpuTestAlu.cs
@@ -10,8 +10,8 @@ namespace Ryujinx.Tests.Cpu
         public void Add()
         {
             // ADD X0, X1, X2
-            ARegisters Registers = SingleOpcode(0x8B020020, X1: 1, X2: 2);
-            Assert.AreEqual(3, Registers.X0);
+            AThreadState ThreadState = SingleOpcode(0x8B020020, X1: 1, X2: 2);
+            Assert.AreEqual(3, ThreadState.X0);
         }
 
         [Test]
@@ -28,10 +28,10 @@ namespace Ryujinx.Tests.Cpu
 
             foreach (var test in tests)
             {
-                ARegisters Registers = SingleOpcode(Opcode, X1: test.W1, X2: test.W2);
-                Assert.AreEqual(test.Result,   Registers.X0);
-                Assert.AreEqual(test.Negative, Registers.Negative);
-                Assert.AreEqual(test.Zero,     Registers.Zero);
+                AThreadState ThreadState = SingleOpcode(Opcode, X1: test.W1, X2: test.W2);
+                Assert.AreEqual(test.Result,   ThreadState.X0);
+                Assert.AreEqual(test.Negative, ThreadState.Negative);
+                Assert.AreEqual(test.Zero,     ThreadState.Zero);
             }
         }
 
@@ -50,16 +50,16 @@ namespace Ryujinx.Tests.Cpu
         public void RevX0X0()
         {
             // REV X0, X0
-            ARegisters Registers = SingleOpcode(0xDAC00C00, X0: 0xAABBCCDDEEFF1100);
-            Assert.AreEqual(0x0011FFEEDDCCBBAA, Registers.X0);
+            AThreadState ThreadState = SingleOpcode(0xDAC00C00, X0: 0xAABBCCDDEEFF1100);
+            Assert.AreEqual(0x0011FFEEDDCCBBAA, ThreadState.X0);
         }
 
         [Test]
         public void RevW1W1()
         {
             // REV W1, W1
-            ARegisters Registers = SingleOpcode(0x5AC00821, X1: 0x12345678);
-            Assert.AreEqual(0x78563412, Registers.X1);
+            AThreadState ThreadState = SingleOpcode(0x5AC00821, X1: 0x12345678);
+            Assert.AreEqual(0x78563412, ThreadState.X1);
         }
     }
 }