diff options
| author | LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com> | 2018-08-13 23:10:02 +0200 |
|---|---|---|
| committer | gdkchan <gab.dark.100@gmail.com> | 2018-08-13 18:10:02 -0300 |
| commit | 4518c52c65f64a5f7be8866a299056fdf94ef860 (patch) | |
| tree | e599b6a7f231f84820660e1a1a7596b006206e66 /Ryujinx.Tests/Cpu/Tester | |
| parent | c05600a26b8ace0f2d7050d25829a154cd6cdc31 (diff) | |
Add Sadalp_V, Saddlp_V, Uadalp_V, Uaddlp_V instructions; add 8 Tests. (#340)
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
Diffstat (limited to 'Ryujinx.Tests/Cpu/Tester')
| -rw-r--r-- | Ryujinx.Tests/Cpu/Tester/Instructions.cs | 168 |
1 files changed, 168 insertions, 0 deletions
diff --git a/Ryujinx.Tests/Cpu/Tester/Instructions.cs b/Ryujinx.Tests/Cpu/Tester/Instructions.cs index 25873718..8e171474 100644 --- a/Ryujinx.Tests/Cpu/Tester/Instructions.cs +++ b/Ryujinx.Tests/Cpu/Tester/Instructions.cs @@ -3060,6 +3060,90 @@ namespace Ryujinx.Tests.Cpu.Tester V(d, result); } + // sadalp_advsimd.html + public static void Sadalp_V(bool Q, Bits size, Bits Rn, Bits Rd) + { + const bool U = false; + const bool op = true; + + /* Decode Vector */ + int d = (int)UInt(Rd); + int n = (int)UInt(Rn); + + /* if size == '11' then ReservedValue(); */ + + int esize = 8 << (int)UInt(size); + int datasize = (Q ? 128 : 64); + int elements = datasize / (2 * esize); + + bool acc = (op == true); + bool unsigned = (U == true); + + /* Operation */ + /* CheckFPAdvSIMDEnabled64(); */ + + Bits operand = V(datasize, n); + Bits sum; + BigInteger op1; + BigInteger op2; + + Bits result = (acc ? V(datasize, d) : Zeros(datasize)); + + for (int e = 0; e <= elements - 1; e++) + { + op1 = Int(Elem(operand, 2 * e + 0, esize), unsigned); + op2 = Int(Elem(operand, 2 * e + 1, esize), unsigned); + + sum = (op1 + op2).SubBigInteger(2 * esize - 1, 0); + + Elem(result, e, 2 * esize, Elem(result, e, 2 * esize) + sum); + } + + V(d, result); + } + + // saddlp_advsimd.html + public static void Saddlp_V(bool Q, Bits size, Bits Rn, Bits Rd) + { + const bool U = false; + const bool op = false; + + /* Decode Vector */ + int d = (int)UInt(Rd); + int n = (int)UInt(Rn); + + /* if size == '11' then ReservedValue(); */ + + int esize = 8 << (int)UInt(size); + int datasize = (Q ? 128 : 64); + int elements = datasize / (2 * esize); + + bool acc = (op == true); + bool unsigned = (U == true); + + /* Operation */ + /* CheckFPAdvSIMDEnabled64(); */ + + Bits operand = V(datasize, n); + Bits sum; + BigInteger op1; + BigInteger op2; + + Bits result = (acc ? V(datasize, d) : Zeros(datasize)); + + for (int e = 0; e <= elements - 1; e++) + { + op1 = Int(Elem(operand, 2 * e + 0, esize), unsigned); + op2 = Int(Elem(operand, 2 * e + 1, esize), unsigned); + + sum = (op1 + op2).SubBigInteger(2 * esize - 1, 0); + + Elem(result, e, 2 * esize, Elem(result, e, 2 * esize) + sum); + } + + V(d, result); + } + // sqabs_advsimd.html#SQABS_asisdmisc_R public static void Sqabs_S(Bits size, Bits Rn, Bits Rd) { @@ -3522,6 +3606,90 @@ namespace Ryujinx.Tests.Cpu.Tester V(d, result); } + // uadalp_advsimd.html + public static void Uadalp_V(bool Q, Bits size, Bits Rn, Bits Rd) + { + const bool U = true; + const bool op = true; + + /* Decode Vector */ + int d = (int)UInt(Rd); + int n = (int)UInt(Rn); + + /* if size == '11' then ReservedValue(); */ + + int esize = 8 << (int)UInt(size); + int datasize = (Q ? 128 : 64); + int elements = datasize / (2 * esize); + + bool acc = (op == true); + bool unsigned = (U == true); + + /* Operation */ + /* CheckFPAdvSIMDEnabled64(); */ + + Bits operand = V(datasize, n); + Bits sum; + BigInteger op1; + BigInteger op2; + + Bits result = (acc ? V(datasize, d) : Zeros(datasize)); + + for (int e = 0; e <= elements - 1; e++) + { + op1 = Int(Elem(operand, 2 * e + 0, esize), unsigned); + op2 = Int(Elem(operand, 2 * e + 1, esize), unsigned); + + sum = (op1 + op2).SubBigInteger(2 * esize - 1, 0); + + Elem(result, e, 2 * esize, Elem(result, e, 2 * esize) + sum); + } + + V(d, result); + } + + // uaddlp_advsimd.html + public static void Uaddlp_V(bool Q, Bits size, Bits Rn, Bits Rd) + { + const bool U = true; + const bool op = false; + + /* Decode Vector */ + int d = (int)UInt(Rd); + int n = (int)UInt(Rn); + + /* if size == '11' then ReservedValue(); */ + + int esize = 8 << (int)UInt(size); + int datasize = (Q ? 128 : 64); + int elements = datasize / (2 * esize); + + bool acc = (op == true); + bool unsigned = (U == true); + + /* Operation */ + /* CheckFPAdvSIMDEnabled64(); */ + + Bits operand = V(datasize, n); + Bits sum; + BigInteger op1; + BigInteger op2; + + Bits result = (acc ? V(datasize, d) : Zeros(datasize)); + + for (int e = 0; e <= elements - 1; e++) + { + op1 = Int(Elem(operand, 2 * e + 0, esize), unsigned); + op2 = Int(Elem(operand, 2 * e + 1, esize), unsigned); + + sum = (op1 + op2).SubBigInteger(2 * esize - 1, 0); + + Elem(result, e, 2 * esize, Elem(result, e, 2 * esize) + sum); + } + + V(d, result); + } + // uqxtn_advsimd.html#UQXTN_asisdmisc_N public static void Uqxtn_S(Bits size, Bits Rn, Bits Rd) { |
