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authorLDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>2018-07-15 05:53:26 +0200
committergdkchan <gab.dark.100@gmail.com>2018-07-15 00:53:26 -0300
commit063fae50fe25388d10e9ec1915c561dc0f4d519d (patch)
tree768070410b2594e064a540d1eb5e737aab428df3 /Ryujinx.Tests/Cpu/Tester
parent50b706e2baef0a7a80af94de51fd9e3bd31ae1ff (diff)
Fix EmitHighNarrow(), EmitSaturatingNarrowOp() when Rd == Rn || Rd == Rm (& Part != 0). Optimization of EmitVectorTranspose(), EmitVectorUnzip(), EmitVectorZip() algorithms (reduction of the number of operations and their complexity). Add 12 Tests about Trn1/2, Uzp1/2, Zip1/2 (V) instructions. (#268)
* Update CpuTestSimdArithmetic.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Update Instructions.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdHelper.cs * Update AInstEmitSimdMove.cs * Delete CpuTestSimdMove.cs
Diffstat (limited to 'Ryujinx.Tests/Cpu/Tester')
-rw-r--r--Ryujinx.Tests/Cpu/Tester/Instructions.cs208
1 files changed, 208 insertions, 0 deletions
diff --git a/Ryujinx.Tests/Cpu/Tester/Instructions.cs b/Ryujinx.Tests/Cpu/Tester/Instructions.cs
index 1590019a..68f83423 100644
--- a/Ryujinx.Tests/Cpu/Tester/Instructions.cs
+++ b/Ryujinx.Tests/Cpu/Tester/Instructions.cs
@@ -4655,6 +4655,74 @@ namespace Ryujinx.Tests.Cpu.Tester
Vpart(d, part, result);
}
+ // trn1_advsimd.html
+ public static void Trn1_V(bool Q, Bits size, Bits Rm, Bits Rn, Bits Rd)
+ {
+ const bool op = false;
+
+ /* Decode */
+ int d = (int)UInt(Rd);
+ int n = (int)UInt(Rn);
+ int m = (int)UInt(Rm);
+
+ /* if size:Q == '110' then ReservedValue(); */
+
+ int esize = 8 << (int)UInt(size);
+ int datasize = (Q ? 128 : 64);
+ int elements = datasize / esize;
+ int part = (int)UInt(op);
+ int pairs = elements / 2;
+
+ /* Operation */
+ /* CheckFPAdvSIMDEnabled64(); */
+
+ Bits result = new Bits(datasize);
+ Bits operand1 = V(datasize, n);
+ Bits operand2 = V(datasize, m);
+
+ for (int p = 0; p <= pairs - 1; p++)
+ {
+ Elem(result, 2 * p + 0, esize, Elem(operand1, 2 * p + part, esize));
+ Elem(result, 2 * p + 1, esize, Elem(operand2, 2 * p + part, esize));
+ }
+
+ V(d, result);
+ }
+
+ // trn2_advsimd.html
+ public static void Trn2_V(bool Q, Bits size, Bits Rm, Bits Rn, Bits Rd)
+ {
+ const bool op = true;
+
+ /* Decode */
+ int d = (int)UInt(Rd);
+ int n = (int)UInt(Rn);
+ int m = (int)UInt(Rm);
+
+ /* if size:Q == '110' then ReservedValue(); */
+
+ int esize = 8 << (int)UInt(size);
+ int datasize = (Q ? 128 : 64);
+ int elements = datasize / esize;
+ int part = (int)UInt(op);
+ int pairs = elements / 2;
+
+ /* Operation */
+ /* CheckFPAdvSIMDEnabled64(); */
+
+ Bits result = new Bits(datasize);
+ Bits operand1 = V(datasize, n);
+ Bits operand2 = V(datasize, m);
+
+ for (int p = 0; p <= pairs - 1; p++)
+ {
+ Elem(result, 2 * p + 0, esize, Elem(operand1, 2 * p + part, esize));
+ Elem(result, 2 * p + 1, esize, Elem(operand2, 2 * p + part, esize));
+ }
+
+ V(d, result);
+ }
+
// uaba_advsimd.html
public static void Uaba_V(bool Q, Bits size, Bits Rm, Bits Rn, Bits Rd)
{
@@ -4832,6 +4900,146 @@ namespace Ryujinx.Tests.Cpu.Tester
V(d, result);
}
+
+ // uzp1_advsimd.html
+ public static void Uzp1_V(bool Q, Bits size, Bits Rm, Bits Rn, Bits Rd)
+ {
+ const bool op = false;
+
+ /* Decode */
+ int d = (int)UInt(Rd);
+ int n = (int)UInt(Rn);
+ int m = (int)UInt(Rm);
+
+ /* if size:Q == '110' then ReservedValue(); */
+
+ int esize = 8 << (int)UInt(size);
+ int datasize = (Q ? 128 : 64);
+ int elements = datasize / esize;
+ int part = (int)UInt(op);
+
+ /* Operation */
+ /* CheckFPAdvSIMDEnabled64(); */
+
+ Bits result = new Bits(datasize);
+ Bits operandl = V(datasize, n);
+ Bits operandh = V(datasize, m);
+
+ Bits zipped = Bits.Concat(operandh, operandl);
+
+ for (int e = 0; e <= elements - 1; e++)
+ {
+ Elem(result, e, esize, Elem(zipped, 2 * e + part, esize));
+ }
+
+ V(d, result);
+ }
+
+ // uzp2_advsimd.html
+ public static void Uzp2_V(bool Q, Bits size, Bits Rm, Bits Rn, Bits Rd)
+ {
+ const bool op = true;
+
+ /* Decode */
+ int d = (int)UInt(Rd);
+ int n = (int)UInt(Rn);
+ int m = (int)UInt(Rm);
+
+ /* if size:Q == '110' then ReservedValue(); */
+
+ int esize = 8 << (int)UInt(size);
+ int datasize = (Q ? 128 : 64);
+ int elements = datasize / esize;
+ int part = (int)UInt(op);
+
+ /* Operation */
+ /* CheckFPAdvSIMDEnabled64(); */
+
+ Bits result = new Bits(datasize);
+ Bits operandl = V(datasize, n);
+ Bits operandh = V(datasize, m);
+
+ Bits zipped = Bits.Concat(operandh, operandl);
+
+ for (int e = 0; e <= elements - 1; e++)
+ {
+ Elem(result, e, esize, Elem(zipped, 2 * e + part, esize));
+ }
+
+ V(d, result);
+ }
+
+ // zip1_advsimd.html
+ public static void Zip1_V(bool Q, Bits size, Bits Rm, Bits Rn, Bits Rd)
+ {
+ const bool op = false;
+
+ /* Decode */
+ int d = (int)UInt(Rd);
+ int n = (int)UInt(Rn);
+ int m = (int)UInt(Rm);
+
+ /* if size:Q == '110' then ReservedValue(); */
+
+ int esize = 8 << (int)UInt(size);
+ int datasize = (Q ? 128 : 64);
+ int elements = datasize / esize;
+ int part = (int)UInt(op);
+ int pairs = elements / 2;
+
+ /* Operation */
+ /* CheckFPAdvSIMDEnabled64(); */
+
+ Bits result = new Bits(datasize);
+ Bits operand1 = V(datasize, n);
+ Bits operand2 = V(datasize, m);
+
+ int @base = part * pairs;
+
+ for (int p = 0; p <= pairs - 1; p++)
+ {
+ Elem(result, 2 * p + 0, esize, Elem(operand1, @base + p, esize));
+ Elem(result, 2 * p + 1, esize, Elem(operand2, @base + p, esize));
+ }
+
+ V(d, result);
+ }
+
+ // zip2_advsimd.html
+ public static void Zip2_V(bool Q, Bits size, Bits Rm, Bits Rn, Bits Rd)
+ {
+ const bool op = true;
+
+ /* Decode */
+ int d = (int)UInt(Rd);
+ int n = (int)UInt(Rn);
+ int m = (int)UInt(Rm);
+
+ /* if size:Q == '110' then ReservedValue(); */
+
+ int esize = 8 << (int)UInt(size);
+ int datasize = (Q ? 128 : 64);
+ int elements = datasize / esize;
+ int part = (int)UInt(op);
+ int pairs = elements / 2;
+
+ /* Operation */
+ /* CheckFPAdvSIMDEnabled64(); */
+
+ Bits result = new Bits(datasize);
+ Bits operand1 = V(datasize, n);
+ Bits operand2 = V(datasize, m);
+
+ int @base = part * pairs;
+
+ for (int p = 0; p <= pairs - 1; p++)
+ {
+ Elem(result, 2 * p + 0, esize, Elem(operand1, @base + p, esize));
+ Elem(result, 2 * p + 1, esize, Elem(operand2, @base + p, esize));
+ }
+
+ V(d, result);
+ }
#endregion
}
}