Add Sse Opt. for S/Umax_V, S/Umin_V, S/Uaddw_V, S/Usubw_V, Fabs_S/V, Fneg_S/V Inst.; for Fcvtl_V, Fcvtn_V Inst.; and for Fcmp_S Inst.. Add/Improve other Sse Opt.. Add Tests. (#496)

* Update CpuTest.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs

* Update InstEmitSimdCmp.cs

* Update SoftFloat.cs

* Update InstEmitAluHelper.cs

* Update InstEmitSimdArithmetic.cs

* Update InstEmitSimdHelper.cs

* Update VectorHelper.cs

* Update InstEmitSimdCvt.cs

* Update InstEmitSimdArithmetic.cs

* Update CpuTestSimd.cs

* Update InstEmitSimdArithmetic.cs

* Update OpCodeTable.cs

* Update InstEmitSimdArithmetic.cs

* Update InstEmitSimdCmp.cs

* Update InstEmitSimdCvt.cs

* Update CpuTestSimd.cs

* Update CpuTestSimdReg.cs

* Create CpuTestSimdFcond.cs

* Update OpCodeTable.cs

* Update InstEmitSimdMove.cs

* Update CpuTestSimdIns.cs

* Create CpuTestSimdExt.cs

* Nit.

* Update PackageReference.

1 files changed, 194 insertions, 0 deletions

diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdReg.cs b/Ryujinx.Tests/Cpu/CpuTestSimdReg.cs
index 43423725..d43447a7 100644
--- a/Ryujinx.Tests/Cpu/CpuTestSimdReg.cs
+++ b/Ryujinx.Tests/Cpu/CpuTestSimdReg.cs
@@ -250,6 +250,24 @@ namespace Ryujinx.Tests.Cpu
             };
         }
 
+        private static uint[] _F_Cmp_Cmpe_S_S_()
+        {
+            return new uint[]
+            {
+                0x1E222020u, // FCMP  S1, S2
+                0x1E222030u  // FCMPE S1, S2
+            };
+        }
+
+        private static uint[] _F_Cmp_Cmpe_S_D_()
+        {
+            return new uint[]
+            {
+                0x1E622020u, // FCMP  D1, D2
+                0x1E622030u  // FCMPE D1, D2
+            };
+        }
+
         private static uint[] _F_Madd_Msub_S_S_()
         {
             return new uint[]
@@ -316,6 +334,24 @@ namespace Ryujinx.Tests.Cpu
             };
         }
 
+        private static uint[] _F_Mla_Mls_V_2S_4S_()
+        {
+            return new uint[]
+            {
+                0x0E20CC00u, // FMLA V0.2S, V0.2S, V0.2S
+                0x0EA0CC00u  // FMLS V0.2S, V0.2S, V0.2S
+            };
+        }
+
+        private static uint[] _F_Mla_Mls_V_2D_()
+        {
+            return new uint[]
+            {
+                0x4E60CC00u, // FMLA V0.2D, V0.2D, V0.2D
+                0x4EE0CC00u  // FMLS V0.2D, V0.2D, V0.2D
+            };
+        }
+
         private static uint[] _F_Recps_Rsqrts_S_S_()
         {
             return new uint[]
@@ -372,6 +408,28 @@ namespace Ryujinx.Tests.Cpu
                 0x5E006000u  // SHA256SU1 V0.4S, V0.4S, V0.4S
             };
         }
+
+        private static uint[] _S_Max_Min_P_V_()
+        {
+            return new uint[]
+            {
+                0x0E206400u, // SMAX  V0.8B, V0.8B, V0.8B
+                0x0E20A400u, // SMAXP V0.8B, V0.8B, V0.8B
+                0x0E206C00u, // SMIN  V0.8B, V0.8B, V0.8B
+                0x0E20AC00u  // SMINP V0.8B, V0.8B, V0.8B
+            };
+        }
+
+        private static uint[] _U_Max_Min_P_V_()
+        {
+            return new uint[]
+            {
+                0x2E206400u, // UMAX  V0.8B, V0.8B, V0.8B
+                0x2E20A400u, // UMAXP V0.8B, V0.8B, V0.8B
+                0x2E206C00u, // UMIN  V0.8B, V0.8B, V0.8B
+                0x2E20AC00u  // UMINP V0.8B, V0.8B, V0.8B
+            };
+        }
 #endregion
 
         private const int RndCnt = 2;
@@ -1248,6 +1306,42 @@ namespace Ryujinx.Tests.Cpu
             CompareAgainstUnicorn(fpsrMask: Fpsr.Ioc | Fpsr.Dzc | Fpsr.Idc);
         }
 
+        [Test, Pairwise] [Explicit]
+        public void F_Cmp_Cmpe_S_S([ValueSource("_F_Cmp_Cmpe_S_S_")] uint opcodes,
+                                   [ValueSource("_1S_F_")] ulong a,
+                                   [ValueSource("_1S_F_")] ulong b)
+        {
+            Vector128<float> v1 = MakeVectorE0(a);
+            Vector128<float> v2 = MakeVectorE0(b);
+
+            bool v = TestContext.CurrentContext.Random.NextBool();
+            bool c = TestContext.CurrentContext.Random.NextBool();
+            bool z = TestContext.CurrentContext.Random.NextBool();
+            bool n = TestContext.CurrentContext.Random.NextBool();
+
+            SingleOpcode(opcodes, v1: v1, v2: v2, overflow: v, carry: c, zero: z, negative: n);
+
+            CompareAgainstUnicorn(fpsrMask: Fpsr.Ioc);
+        }
+
+        [Test, Pairwise] [Explicit]
+        public void F_Cmp_Cmpe_S_D([ValueSource("_F_Cmp_Cmpe_S_D_")] uint opcodes,
+                                   [ValueSource("_1D_F_")] ulong a,
+                                   [ValueSource("_1D_F_")] ulong b)
+        {
+            Vector128<float> v1 = MakeVectorE0(a);
+            Vector128<float> v2 = MakeVectorE0(b);
+
+            bool v = TestContext.CurrentContext.Random.NextBool();
+            bool c = TestContext.CurrentContext.Random.NextBool();
+            bool z = TestContext.CurrentContext.Random.NextBool();
+            bool n = TestContext.CurrentContext.Random.NextBool();
+
+            SingleOpcode(opcodes, v1: v1, v2: v2, overflow: v, carry: c, zero: z, negative: n);
+
+            CompareAgainstUnicorn(fpsrMask: Fpsr.Ioc);
+        }
+
         [Test, Pairwise] [Explicit] // Fused.
         public void F_Madd_Msub_S_S([ValueSource("_F_Madd_Msub_S_S_")] uint opcodes,
                                     [ValueSource("_1S_F_")] ulong a,
@@ -1385,6 +1479,58 @@ namespace Ryujinx.Tests.Cpu
         }
 
         [Test, Pairwise] [Explicit] // Fused.
+        public void F_Mla_Mls_V_2S_4S([ValueSource("_F_Mla_Mls_V_2S_4S_")] uint opcodes,
+                                      [Values(0u)]     uint rd,
+                                      [Values(1u, 0u)] uint rn,
+                                      [Values(2u, 0u)] uint rm,
+                                      [ValueSource("_2S_F_")] ulong z,
+                                      [ValueSource("_2S_F_")] ulong a,
+                                      [ValueSource("_2S_F_")] ulong b,
+                                      [Values(0b0u, 0b1u)] uint q) // <2S, 4S>
+        {
+            opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
+            opcodes |= ((q & 1) << 30);
+
+            Vector128<float> v0 = MakeVectorE0E1(z, z);
+            Vector128<float> v1 = MakeVectorE0E1(a, a * q);
+            Vector128<float> v2 = MakeVectorE0E1(b, b * q);
+
+            int rnd = (int)TestContext.CurrentContext.Random.NextUInt();
+
+            int fpcr = rnd & (1 << (int)Fpcr.Fz);
+            fpcr |= rnd & (1 << (int)Fpcr.Dn);
+
+            SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2, fpcr: fpcr);
+
+            CompareAgainstUnicorn(Fpsr.Ioc | Fpsr.Idc, FpSkips.IfUnderflow, FpTolerances.UpToOneUlpsS);
+        }
+
+        [Test, Pairwise] [Explicit] // Fused.
+        public void F_Mla_Mls_V_2D([ValueSource("_F_Mla_Mls_V_2D_")] uint opcodes,
+                                   [Values(0u)]     uint rd,
+                                   [Values(1u, 0u)] uint rn,
+                                   [Values(2u, 0u)] uint rm,
+                                   [ValueSource("_1D_F_")] ulong z,
+                                   [ValueSource("_1D_F_")] ulong a,
+                                   [ValueSource("_1D_F_")] ulong b)
+        {
+            opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
+
+            Vector128<float> v0 = MakeVectorE0E1(z, z);
+            Vector128<float> v1 = MakeVectorE0E1(a, a);
+            Vector128<float> v2 = MakeVectorE0E1(b, b);
+
+            int rnd = (int)TestContext.CurrentContext.Random.NextUInt();
+
+            int fpcr = rnd & (1 << (int)Fpcr.Fz);
+            fpcr |= rnd & (1 << (int)Fpcr.Dn);
+
+            SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2, fpcr: fpcr);
+
+            CompareAgainstUnicorn(Fpsr.Ioc | Fpsr.Idc, FpSkips.IfUnderflow, FpTolerances.UpToOneUlpsD);
+        }
+
+        [Test, Pairwise] [Explicit] // Fused.
         public void F_Recps_Rsqrts_S_S([ValueSource("_F_Recps_Rsqrts_S_S_")] uint opcodes,
                                        [ValueSource("_1S_F_")] ulong a,
                                        [ValueSource("_1S_F_")] ulong b)
@@ -2036,6 +2182,30 @@ namespace Ryujinx.Tests.Cpu
             CompareAgainstUnicorn();
         }
 
+        [Test, Pairwise]
+        public void S_Max_Min_P_V([ValueSource("_S_Max_Min_P_V_")] uint opcodes,
+                                  [Values(0u)]     uint rd,
+                                  [Values(1u, 0u)] uint rn,
+                                  [Values(2u, 0u)] uint rm,
+                                  [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong z,
+                                  [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong a,
+                                  [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong b,
+                                  [Values(0b00u, 0b01u, 0b10u)] uint size, // Q0: <8B,  4H, 2S>
+                                  [Values(0b0u, 0b1u)] uint q)             // Q1: <16B, 8H, 4S>
+        {
+            opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
+            opcodes |= ((size & 3) << 22);
+            opcodes |= ((q & 1) << 30);
+
+            Vector128<float> v0 = MakeVectorE0E1(z, z);
+            Vector128<float> v1 = MakeVectorE0E1(a, a * q);
+            Vector128<float> v2 = MakeVectorE0E1(b, b * q);
+
+            SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2);
+
+            CompareAgainstUnicorn();
+        }
+
         [Test, Pairwise, Description("SMLAL{2} <Vd>.<Ta>, <Vn>.<Tb>, <Vm>.<Tb>")]
         public void Smlal_V_8B8H_4H4S_2S2D([Values(0u)]     uint rd,
                                            [Values(1u, 0u)] uint rn,
@@ -3068,6 +3238,30 @@ namespace Ryujinx.Tests.Cpu
             CompareAgainstUnicorn();
         }
 
+        [Test, Pairwise]
+        public void U_Max_Min_P_V([ValueSource("_U_Max_Min_P_V_")] uint opcodes,
+                                  [Values(0u)]     uint rd,
+                                  [Values(1u, 0u)] uint rn,
+                                  [Values(2u, 0u)] uint rm,
+                                  [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong z,
+                                  [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong a,
+                                  [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong b,
+                                  [Values(0b00u, 0b01u, 0b10u)] uint size, // Q0: <8B,  4H, 2S>
+                                  [Values(0b0u, 0b1u)] uint q)             // Q1: <16B, 8H, 4S>
+        {
+            opcodes |= ((rm & 31) << 16) | ((rn & 31) << 5) | ((rd & 31) << 0);
+            opcodes |= ((size & 3) << 22);
+            opcodes |= ((q & 1) << 30);
+
+            Vector128<float> v0 = MakeVectorE0E1(z, z);
+            Vector128<float> v1 = MakeVectorE0E1(a, a * q);
+            Vector128<float> v2 = MakeVectorE0E1(b, b * q);
+
+            SingleOpcode(opcodes, v0: v0, v1: v1, v2: v2);
+
+            CompareAgainstUnicorn();
+        }
+
         [Test, Pairwise, Description("UMLAL{2} <Vd>.<Ta>, <Vn>.<Tb>, <Vm>.<Tb>")]
         public void Umlal_V_8B8H_4H4S_2S2D([Values(0u)]     uint rd,
                                            [Values(1u, 0u)] uint rn,