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| author | Alex Barney <thealexbarney@gmail.com> | 2018-10-30 19:43:02 -0600 |
|---|---|---|
| committer | gdkchan <gab.dark.100@gmail.com> | 2018-10-30 22:43:02 -0300 |
| commit | 9cb57fb4bb3bbae0ae052a5af4a96a49fc5d864d (patch) | |
| tree | 0c97425aeb311c142bc92a6fcc503cb2c07d4376 /Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs | |
| parent | 5a87e58183578f5b84ca8d01cbb76aed11820f78 (diff) | |
Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
* Change naming convention for Ryujinx project
* Change naming convention for ChocolArm64 project
* Fix NaN
* Remove unneeded this. from Ryujinx project
* Adjust naming from new PRs
* Name changes based on feedback
* How did this get removed?
* Rebasing fix
* Change FP enum case
* Remove prefix from ChocolArm64 classes - Part 1
* Remove prefix from ChocolArm64 classes - Part 2
* Fix alignment from last commit's renaming
* Rename namespaces
* Rename stragglers
* Fix alignment
* Rename OpCode class
* Missed a few
* Adjust alignment
Diffstat (limited to 'Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs')
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs | 28 |
1 files changed, 14 insertions, 14 deletions
diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs b/Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs index 08e2894c..770eb4cf 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs @@ -21,7 +21,7 @@ namespace Ryujinx.Tests.Cpu Vector128<float> V1 = MakeVectorE0(A); - AThreadState ThreadState = SingleOpcode(Opcode, V1: V1); + CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1); Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(Result)); @@ -78,7 +78,7 @@ namespace Ryujinx.Tests.Cpu FpcrTemp = 0x2000000; } - AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); + CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(Result)); @@ -107,7 +107,7 @@ namespace Ryujinx.Tests.Cpu FpcrTemp = 0x2000000; } - AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); + CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); Assert.Multiple(() => { @@ -177,7 +177,7 @@ namespace Ryujinx.Tests.Cpu FpcrTemp |= 1 << 25; } - AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); + CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(Result)); @@ -233,7 +233,7 @@ namespace Ryujinx.Tests.Cpu FpcrTemp |= 1 << 25; } - AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); + CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); Assert.Multiple(() => { @@ -294,7 +294,7 @@ namespace Ryujinx.Tests.Cpu FpcrTemp = 0x2000000; } - AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); + CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(Result)); @@ -319,7 +319,7 @@ namespace Ryujinx.Tests.Cpu FpcrTemp = 0x2000000; } - AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); + CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); Assert.Multiple(() => { @@ -381,7 +381,7 @@ namespace Ryujinx.Tests.Cpu FpcrTemp = 0x2000000; } - AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); + CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(Result)); @@ -409,7 +409,7 @@ namespace Ryujinx.Tests.Cpu FpcrTemp = 0x2000000; } - AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); + CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); Assert.Multiple(() => { @@ -470,7 +470,7 @@ namespace Ryujinx.Tests.Cpu FpcrTemp = 0x2000000; } - AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); + CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(Result)); @@ -495,7 +495,7 @@ namespace Ryujinx.Tests.Cpu FpcrTemp = 0x2000000; } - AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); + CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); Assert.Multiple(() => { @@ -565,7 +565,7 @@ namespace Ryujinx.Tests.Cpu FpcrTemp |= 1 << 25; } - AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); + CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(Result)); @@ -621,7 +621,7 @@ namespace Ryujinx.Tests.Cpu FpcrTemp |= 1 << 25; } - AThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); + CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1, Fpcr: FpcrTemp); Assert.Multiple(() => { @@ -639,7 +639,7 @@ namespace Ryujinx.Tests.Cpu Vector128<float> V1 = MakeVectorE0(A); - AThreadState ThreadState = SingleOpcode(Opcode, V1: V1); + CpuThreadState ThreadState = SingleOpcode(Opcode, V1: V1); Assert.That(GetVectorE0(ThreadState.V0), Is.EqualTo(Result)); |