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authorMerry <MerryMage@users.noreply.github.com>2018-04-06 00:36:19 +0100
committergdkchan <gab.dark.100@gmail.com>2018-04-05 20:36:19 -0300
commit39f20d8d1ad9e52741bb6bb28b1ba24c6e759aec (patch)
tree9302306b7c020a7fa677ad551423084ff85da0c9 /Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs
parent4c19c908e5d0c7e5d305fa816c53c9787432b83c (diff)
Implement Frsqrte_S (#72)
* Implement Frsqrte_S * Implement Frsqrte_V * Add Frsqrte_S test
Diffstat (limited to 'Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs')
-rw-r--r--Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs8
1 files changed, 8 insertions, 0 deletions
diff --git a/Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs b/Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs
index bbac9e16..7765253b 100644
--- a/Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs
+++ b/Ryujinx.Tests/Cpu/CpuTestSimdArithmetic.cs
@@ -618,5 +618,13 @@ namespace Ryujinx.Tests.Cpu
Assert.AreEqual(Result1, ThreadState.V0.X1);
});
}
+
+ [TestCase(0x41200000u, 0x3EA18000u)]
+ public void Frsqrte_S(uint A, uint Result)
+ {
+ AVec V1 = new AVec { X0 = A };
+ AThreadState ThreadState = SingleOpcode(0x7EA1D820, V1: V1);
+ Assert.AreEqual(Result, ThreadState.V0.X0);
+ }
}
}