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authorgdkchan <gab.dark.100@gmail.com>2022-12-21 20:05:58 -0300
committerGitHub <noreply@github.com>2022-12-21 23:05:58 +0000
commit219f63ff4ebb739f349ca3ddd6c11e5068bcf0f1 (patch)
treedfcc490fefdb6f3249cdb6bb4e41d382bf743eee /Ryujinx.Tests/Cpu/CpuTestSimd.cs
parent1cca3e99ab04e56aa4b30f3fa83f240f8d0fd29d (diff)
Fix CPU FCVTN instruction implementation (slow path) (#4159)
* Fix CPU FCVTN instruction implementation (slow path) * PPTC version bump
Diffstat (limited to 'Ryujinx.Tests/Cpu/CpuTestSimd.cs')
-rw-r--r--Ryujinx.Tests/Cpu/CpuTestSimd.cs8
1 files changed, 4 insertions, 4 deletions
diff --git a/Ryujinx.Tests/Cpu/CpuTestSimd.cs b/Ryujinx.Tests/Cpu/CpuTestSimd.cs
index be3db0e7..04110ec3 100644
--- a/Ryujinx.Tests/Cpu/CpuTestSimd.cs
+++ b/Ryujinx.Tests/Cpu/CpuTestSimd.cs
@@ -2176,8 +2176,8 @@ namespace Ryujinx.Tests.Cpu
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
opcodes |= ((q & 1) << 30);
- V128 v0 = MakeVectorE0E1(z, z);
- V128 v1 = MakeVectorE0E1(a, a);
+ V128 v0 = MakeVectorE0E1(z, a);
+ V128 v1 = MakeVectorE0E1(a, z);
int rnd = (int)TestContext.CurrentContext.Random.NextUInt();
@@ -2202,8 +2202,8 @@ namespace Ryujinx.Tests.Cpu
opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
opcodes |= ((q & 1) << 30);
- V128 v0 = MakeVectorE0E1(z, z);
- V128 v1 = MakeVectorE0E1(a, a);
+ V128 v0 = MakeVectorE0E1(z, a);
+ V128 v1 = MakeVectorE0E1(a, z);
SingleOpcode(opcodes, v0: v0, v1: v1);