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authorLDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>2019-06-30 01:02:48 +0200
committergdkchan <gab.dark.100@gmail.com>2019-06-29 20:02:48 -0300
commit10c74182babaf8cf6bedaeffd64c3109df4ea816 (patch)
treeee55c64d3a022e322f995e129187251583027aae /Ryujinx.Tests/Cpu/CpuTestSimd.cs
parentba86a5d7f3aa0127c4732c739af3f6086fb6acd9 (diff)
Implement the remaining tests for Simd and Fp instructions of data processing type. Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. (#709)
* Update CpuTestSimdShImm.cs * Update OpCodeTable.cs * Update CpuTestSimdReg.cs * Add Ins_Gp & Ins_V Tests. Improve Smov_S & Umov_S Tests. * Add Bic_Vi & Orr_Vi Tests. * OpTable Fixes for Bic_Vi & Orr_Vi Insts. * Add Saddlv_V & Uaddlv_V Tests. * Nit. * Add Smull_V & Umull_V Tests. Improve Simd Permute Tests. * Nit. * Add Fcsel_S Test. * Add Fnmadd_S, Fnmsub_S & Fnmul_S Tests. * Fmov_V -> Fmov_Vi * OpTable Fixes for Fmov_Si & Fmov_Vi Insts. * Add Fmov_Vi Test. * Add Fmov_S Test. * Add Fmov_Si Test. Add new test category SimdFmov. * Nit. * OpTable Fixes for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. * Small opts. for Fmov_Ftoi/1 & Fmov_Itof/1 Insts. Small simpl. for Smov_S Inst. Remove unnecessary method EmitIntZeroUpperIfNeeded. * Add Fmov_Ftoi/1 & Fmov_Itof/1 Tests.
Diffstat (limited to 'Ryujinx.Tests/Cpu/CpuTestSimd.cs')
-rw-r--r--Ryujinx.Tests/Cpu/CpuTestSimd.cs258
1 files changed, 258 insertions, 0 deletions
diff --git a/Ryujinx.Tests/Cpu/CpuTestSimd.cs b/Ryujinx.Tests/Cpu/CpuTestSimd.cs
index c08cacac..a62845fe 100644
--- a/Ryujinx.Tests/Cpu/CpuTestSimd.cs
+++ b/Ryujinx.Tests/Cpu/CpuTestSimd.cs
@@ -618,6 +618,18 @@ namespace Ryujinx.Tests.Cpu
yield return rnd4;
}
}
+
+ private static uint[] _W_()
+ {
+ return new uint[] { 0x00000000u, 0x7FFFFFFFu,
+ 0x80000000u, 0xFFFFFFFFu };
+ }
+
+ private static ulong[] _X_()
+ {
+ return new ulong[] { 0x0000000000000000ul, 0x7FFFFFFFFFFFFFFFul,
+ 0x8000000000000000ul, 0xFFFFFFFFFFFFFFFFul };
+ }
#endregion
#region "ValueSource (Opcodes)"
@@ -877,6 +889,70 @@ namespace Ryujinx.Tests.Cpu
};
}
+ private static uint[] _F_Mov_Ftoi_SW_()
+ {
+ return new uint[]
+ {
+ 0x1E260000u // FMOV W0, S0
+ };
+ }
+
+ private static uint[] _F_Mov_Ftoi_DX_()
+ {
+ return new uint[]
+ {
+ 0x9E660000u // FMOV X0, D0
+ };
+ }
+
+ private static uint[] _F_Mov_Ftoi1_DX_()
+ {
+ return new uint[]
+ {
+ 0x9EAE0000u // FMOV X0, V0.D[1]
+ };
+ }
+
+ private static uint[] _F_Mov_Itof_WS_()
+ {
+ return new uint[]
+ {
+ 0x1E270000u // FMOV S0, W0
+ };
+ }
+
+ private static uint[] _F_Mov_Itof_XD_()
+ {
+ return new uint[]
+ {
+ 0x9E670000u // FMOV D0, X0
+ };
+ }
+
+ private static uint[] _F_Mov_Itof1_XD_()
+ {
+ return new uint[]
+ {
+ 0x9EAF0000u // FMOV V0.D[1], X0
+ };
+ }
+
+ private static uint[] _F_Mov_S_S_()
+ {
+ return new uint[]
+ {
+ 0x1E204020u // FMOV S0, S1
+ };
+ }
+
+ private static uint[] _F_Mov_S_D_()
+ {
+ return new uint[]
+ {
+ 0x1E604020u // FMOV D0, D1
+ };
+ }
+
private static uint[] _F_Recpe_Rsqrte_S_S_()
{
return new uint[]
@@ -997,6 +1073,24 @@ namespace Ryujinx.Tests.Cpu
};
}
+ private static uint[] _SU_Addl_V_V_8BH_4HS_()
+ {
+ return new uint[]
+ {
+ 0x0E303800u, // SADDLV H0, V0.8B
+ 0x2E303800u // UADDLV H0, V0.8B
+ };
+ }
+
+ private static uint[] _SU_Addl_V_V_16BH_8HS_4SD_()
+ {
+ return new uint[]
+ {
+ 0x4E303800u, // SADDLV H0, V0.16B
+ 0x6E303800u // UADDLV H0, V0.16B
+ };
+ }
+
private static uint[] _SU_Cvt_F_S_S_()
{
return new uint[]
@@ -2025,6 +2119,132 @@ namespace Ryujinx.Tests.Cpu
}
[Test, Pairwise] [Explicit]
+ public void F_Mov_Ftoi_SW([ValueSource("_F_Mov_Ftoi_SW_")] uint opcodes,
+ [Values(0u, 31u)] uint rd,
+ [Values(1u)] uint rn,
+ [ValueSource("_1S_F_")] ulong a)
+ {
+ opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
+
+ ulong x0 = (ulong)TestContext.CurrentContext.Random.NextUInt() << 32;
+ uint w31 = TestContext.CurrentContext.Random.NextUInt();
+ Vector128<float> v1 = MakeVectorE0(a);
+
+ SingleOpcode(opcodes, x0: x0, x31: w31, v1: v1);
+
+ CompareAgainstUnicorn();
+ }
+
+ [Test, Pairwise] [Explicit]
+ public void F_Mov_Ftoi_DX([ValueSource("_F_Mov_Ftoi_DX_")] uint opcodes,
+ [Values(0u, 31u)] uint rd,
+ [Values(1u)] uint rn,
+ [ValueSource("_1D_F_")] ulong a)
+ {
+ opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
+
+ ulong x31 = TestContext.CurrentContext.Random.NextULong();
+ Vector128<float> v1 = MakeVectorE0(a);
+
+ SingleOpcode(opcodes, x31: x31, v1: v1);
+
+ CompareAgainstUnicorn();
+ }
+
+ [Test, Pairwise] [Explicit]
+ public void F_Mov_Ftoi1_DX([ValueSource("_F_Mov_Ftoi1_DX_")] uint opcodes,
+ [Values(0u, 31u)] uint rd,
+ [Values(1u)] uint rn,
+ [ValueSource("_1D_F_")] ulong a)
+ {
+ opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
+
+ ulong x31 = TestContext.CurrentContext.Random.NextULong();
+ Vector128<float> v1 = MakeVectorE1(a);
+
+ SingleOpcode(opcodes, x31: x31, v1: v1);
+
+ CompareAgainstUnicorn();
+ }
+
+ [Test, Pairwise] [Explicit]
+ public void F_Mov_Itof_WS([ValueSource("_F_Mov_Itof_WS_")] uint opcodes,
+ [Values(0u)] uint rd,
+ [Values(1u, 31u)] uint rn,
+ [ValueSource("_W_")] [Random(RndCnt)] uint wn)
+ {
+ opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
+
+ uint w31 = TestContext.CurrentContext.Random.NextUInt();
+ ulong z = TestContext.CurrentContext.Random.NextULong();
+ Vector128<float> v0 = MakeVectorE0E1(z, z);
+
+ SingleOpcode(opcodes, x1: wn, x31: w31, v0: v0);
+
+ CompareAgainstUnicorn();
+ }
+
+ [Test, Pairwise] [Explicit]
+ public void F_Mov_Itof_XD([ValueSource("_F_Mov_Itof_XD_")] uint opcodes,
+ [Values(0u)] uint rd,
+ [Values(1u, 31u)] uint rn,
+ [ValueSource("_X_")] [Random(RndCnt)] ulong xn)
+ {
+ opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
+
+ ulong x31 = TestContext.CurrentContext.Random.NextULong();
+ ulong z = TestContext.CurrentContext.Random.NextULong();
+ Vector128<float> v0 = MakeVectorE1(z);
+
+ SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0);
+
+ CompareAgainstUnicorn();
+ }
+
+ [Test, Pairwise] [Explicit]
+ public void F_Mov_Itof1_XD([ValueSource("_F_Mov_Itof1_XD_")] uint opcodes,
+ [Values(0u)] uint rd,
+ [Values(1u, 31u)] uint rn,
+ [ValueSource("_X_")] [Random(RndCnt)] ulong xn)
+ {
+ opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
+
+ ulong x31 = TestContext.CurrentContext.Random.NextULong();
+ ulong z = TestContext.CurrentContext.Random.NextULong();
+ Vector128<float> v0 = MakeVectorE0(z);
+
+ SingleOpcode(opcodes, x1: xn, x31: x31, v0: v0);
+
+ CompareAgainstUnicorn();
+ }
+
+ [Test, Pairwise] [Explicit]
+ public void F_Mov_S_S([ValueSource("_F_Mov_S_S_")] uint opcodes,
+ [ValueSource("_1S_F_")] ulong a)
+ {
+ ulong z = TestContext.CurrentContext.Random.NextULong();
+ Vector128<float> v0 = MakeVectorE0E1(z, z);
+ Vector128<float> v1 = MakeVectorE0(a);
+
+ SingleOpcode(opcodes, v0: v0, v1: v1);
+
+ CompareAgainstUnicorn();
+ }
+
+ [Test, Pairwise] [Explicit]
+ public void F_Mov_S_D([ValueSource("_F_Mov_S_D_")] uint opcodes,
+ [ValueSource("_1D_F_")] ulong a)
+ {
+ ulong z = TestContext.CurrentContext.Random.NextULong();
+ Vector128<float> v0 = MakeVectorE1(z);
+ Vector128<float> v1 = MakeVectorE0(a);
+
+ SingleOpcode(opcodes, v0: v0, v1: v1);
+
+ CompareAgainstUnicorn();
+ }
+
+ [Test, Pairwise] [Explicit]
public void F_Recpe_Rsqrte_S_S([ValueSource("_F_Recpe_Rsqrte_S_S_")] uint opcodes,
[ValueSource("_1S_F_")] ulong a,
[Values(RMode.Rn)] RMode rMode)
@@ -2559,6 +2779,44 @@ namespace Ryujinx.Tests.Cpu
CompareAgainstUnicorn();
}
+ [Test, Pairwise]
+ public void SU_Addl_V_V_8BH_4HS([ValueSource("_SU_Addl_V_V_8BH_4HS_")] uint opcodes,
+ [Values(0u)] uint rd,
+ [Values(1u, 0u)] uint rn,
+ [ValueSource("_8B4H_")] [Random(RndCnt)] ulong z,
+ [ValueSource("_8B4H_")] [Random(RndCnt)] ulong a,
+ [Values(0b00u, 0b01u)] uint size) // <8BH, 4HS>
+ {
+ opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
+ opcodes |= ((size & 3) << 22);
+
+ Vector128<float> v0 = MakeVectorE0E1(z, z);
+ Vector128<float> v1 = MakeVectorE0(a);
+
+ SingleOpcode(opcodes, v0: v0, v1: v1);
+
+ CompareAgainstUnicorn();
+ }
+
+ [Test, Pairwise]
+ public void SU_Addl_V_V_16BH_8HS_4SD([ValueSource("_SU_Addl_V_V_16BH_8HS_4SD_")] uint opcodes,
+ [Values(0u)] uint rd,
+ [Values(1u, 0u)] uint rn,
+ [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong z,
+ [ValueSource("_8B4H2S_")] [Random(RndCnt)] ulong a,
+ [Values(0b00u, 0b01u, 0b10u)] uint size) // <16BH, 8HS, 4SD>
+ {
+ opcodes |= ((rn & 31) << 5) | ((rd & 31) << 0);
+ opcodes |= ((size & 3) << 22);
+
+ Vector128<float> v0 = MakeVectorE0E1(z, z);
+ Vector128<float> v1 = MakeVectorE0E1(a, a);
+
+ SingleOpcode(opcodes, v0: v0, v1: v1);
+
+ CompareAgainstUnicorn();
+ }
+
[Test, Pairwise] [Explicit]
public void SU_Cvt_F_S_S([ValueSource("_SU_Cvt_F_S_S_")] uint opcodes,
[ValueSource("_1S_")] [Random(RndCnt)] ulong a)