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| author | LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com> | 2020-11-18 19:35:54 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-11-18 19:35:54 +0100 |
| commit | 0679084f115b6838dec4d8c5e85044c33d4122d0 (patch) | |
| tree | 0d25ace42740e37d6bb2a8cd30fa92c5313d265a /Ryujinx.Tests/Cpu/CpuTestSimd.cs | |
| parent | eafee34feebd432151809df402f3f696e4d93d08 (diff) | |
CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & Fcvtn_V Instructions. Now HardwareCapabilities uses CpuId. (#1650)
* net5.0
* CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & Fcvtn_V Instructions. Switch to .NET 5.0.
Nits.
Tests performed successfully in both debug and release mode (for all instructions involved).
* Address comment.
* Update appveyor.yml
* Revert "Update appveyor.yml"
This reverts commit 27cdd59e8b90e227e6924d9c162af26c00a89013.
* Remove Assembler CpuId.
* Update appveyor.yml
* Address comment.
Diffstat (limited to 'Ryujinx.Tests/Cpu/CpuTestSimd.cs')
| -rw-r--r-- | Ryujinx.Tests/Cpu/CpuTestSimd.cs | 11 |
1 files changed, 7 insertions, 4 deletions
diff --git a/Ryujinx.Tests/Cpu/CpuTestSimd.cs b/Ryujinx.Tests/Cpu/CpuTestSimd.cs index 249447d7..1371de4b 100644 --- a/Ryujinx.Tests/Cpu/CpuTestSimd.cs +++ b/Ryujinx.Tests/Cpu/CpuTestSimd.cs @@ -1973,15 +1973,18 @@ namespace Ryujinx.Tests.Cpu CompareAgainstUnicorn(); } - [Test, Pairwise] [Explicit] + [Test, Pairwise] [Explicit] // Unicorn seems to default all rounding modes to RMode.Rn. public void F_Cvt_S_SH([ValueSource("_F_Cvt_S_SH_")] uint opcodes, - [ValueSource("_1S_F_")] ulong a) + [ValueSource("_1S_F_")] ulong a, + [Values(RMode.Rn)] RMode rMode) { ulong z = TestContext.CurrentContext.Random.NextULong(); V128 v0 = MakeVectorE0E1(z, z); V128 v1 = MakeVectorE0(a); - SingleOpcode(opcodes, v0: v0, v1: v1); + int fpcr = (int)rMode << (int)Fpcr.RMode; + + SingleOpcode(opcodes, v0: v0, v1: v1, fpcr: fpcr); CompareAgainstUnicorn(); } @@ -2134,7 +2137,7 @@ namespace Ryujinx.Tests.Cpu CompareAgainstUnicorn(fpsrMask: Fpsr.Ioc | Fpsr.Ofc | Fpsr.Ufc | Fpsr.Ixc | Fpsr.Idc); } - [Test, Pairwise] [Explicit] // Unicorn seems to default all rounding modes to RMode.Rn. + [Test, Pairwise] [Explicit] public void F_Cvtn_V_2D2S_2D4S([ValueSource("_F_Cvtn_V_2D2S_2D4S_")] uint opcodes, [Values(0u)] uint rd, [Values(1u, 0u)] uint rn, |