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authorgdkchan <gab.dark.100@gmail.com>2018-04-19 16:18:30 -0300
committergdkchan <gab.dark.100@gmail.com>2018-04-19 16:18:30 -0300
commit03002f6537e3208e6951bc9092e958985e200c7d (patch)
treee3e4eea4eba155d82168915ad7c3a507e3a20f59 /Ryujinx.Graphics/Gal/Shader/ShaderDecodeAlu.cs
parent33ae6e544bd477da629e3f4ab4925f457ecfbbb7 (diff)
Add SvcSetThreadActivity, tweak SignalProcessWideKey, add fmul32i shader instructions and other small fixes
Diffstat (limited to 'Ryujinx.Graphics/Gal/Shader/ShaderDecodeAlu.cs')
-rw-r--r--Ryujinx.Graphics/Gal/Shader/ShaderDecodeAlu.cs13
1 files changed, 10 insertions, 3 deletions
diff --git a/Ryujinx.Graphics/Gal/Shader/ShaderDecodeAlu.cs b/Ryujinx.Graphics/Gal/Shader/ShaderDecodeAlu.cs
index b796ab28..830aeb8c 100644
--- a/Ryujinx.Graphics/Gal/Shader/ShaderDecodeAlu.cs
+++ b/Ryujinx.Graphics/Gal/Shader/ShaderDecodeAlu.cs
@@ -41,6 +41,16 @@ namespace Ryujinx.Graphics.Gal.Shader
EmitAluFfma(Block, OpCode, ShaderOper.RR);
}
+ public static void Fmul32i(ShaderIrBlock Block, long OpCode)
+ {
+ ShaderIrNode OperA = GetOperGpr8 (OpCode);
+ ShaderIrNode OperB = GetOperImmf32_20(OpCode);
+
+ ShaderIrOp Op = new ShaderIrOp(ShaderIrInst.Fmul, OperA, OperB);
+
+ Block.AddNode(GetPredNode(new ShaderIrAsg(GetOperGpr0(OpCode), Op), OpCode));
+ }
+
public static void Fmul_C(ShaderIrBlock Block, long OpCode)
{
EmitAluBinaryF(Block, OpCode, ShaderOper.CR, ShaderIrInst.Fmul);
@@ -212,7 +222,6 @@ namespace Ryujinx.Graphics.Gal.Shader
bool Aa = ((OpCode >> 46) & 1) != 0;
bool Na = ((OpCode >> 48) & 1) != 0;
bool Ab = ((OpCode >> 49) & 1) != 0;
- bool Ad = ((OpCode >> 50) & 1) != 0;
ShaderIrNode OperA = GetOperGpr8(OpCode), OperB;
@@ -234,8 +243,6 @@ namespace Ryujinx.Graphics.Gal.Shader
ShaderIrNode Op = new ShaderIrOp(Inst, OperA, OperB);
- Op = GetAluAbs(Op, Ad);
-
Block.AddNode(GetPredNode(new ShaderIrAsg(GetOperGpr0(OpCode), Op), OpCode));
}