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authorgdk <gab.dark.100@gmail.com>2019-11-30 23:53:09 -0300
committerThog <thog@protonmail.com>2020-01-09 02:13:00 +0100
commit6a98c643cabeea25dc42e19fe475a687a034a532 (patch)
treeccb1ecbfc5b79852be8a1f52e241015142a8a7a9 /Ryujinx.Graphics.Shader/CodeGen/Glsl/Instructions/InstGen.cs
parent396768f3b4494c7dcb0c03942eeb50ef4d47adde (diff)
Add a pass to turn global memory access into storage access, and do all storage related transformations on IR
Diffstat (limited to 'Ryujinx.Graphics.Shader/CodeGen/Glsl/Instructions/InstGen.cs')
-rw-r--r--Ryujinx.Graphics.Shader/CodeGen/Glsl/Instructions/InstGen.cs12
1 files changed, 8 insertions, 4 deletions
diff --git a/Ryujinx.Graphics.Shader/CodeGen/Glsl/Instructions/InstGen.cs b/Ryujinx.Graphics.Shader/CodeGen/Glsl/Instructions/InstGen.cs
index b5cab54e..b6cdd7f6 100644
--- a/Ryujinx.Graphics.Shader/CodeGen/Glsl/Instructions/InstGen.cs
+++ b/Ryujinx.Graphics.Shader/CodeGen/Glsl/Instructions/InstGen.cs
@@ -49,12 +49,18 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Glsl.Instructions
if (argIndex == 0 && atomic)
{
- switch (inst & Instruction.MrMask)
+ Instruction memRegion = inst & Instruction.MrMask;
+
+ switch (memRegion)
{
- // TODO: Global.
case Instruction.MrShared: args += LoadShared (context, operation); break;
case Instruction.MrStorage: args += LoadStorage(context, operation); break;
+
+ default: throw new InvalidOperationException($"Invalid memory region \"{memRegion}\".");
}
+
+ // We use the first 2 operands above.
+ argIndex++;
}
else
{
@@ -150,8 +156,6 @@ namespace Ryujinx.Graphics.Shader.CodeGen.Glsl.Instructions
}
}
- return "0";
-
throw new InvalidOperationException($"Unexpected instruction type \"{info.Type}\".");
}
}