Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)

* Change naming convention for Ryujinx project

* Change naming convention for ChocolArm64 project

* Fix NaN

* Remove unneeded this. from Ryujinx project

* Adjust naming from new PRs

* Name changes based on feedback

* How did this get removed?

* Rebasing fix

* Change FP enum case

* Remove prefix from ChocolArm64 classes - Part 1

* Remove prefix from ChocolArm64 classes - Part 2

* Fix alignment from last commit's renaming

* Rename namespaces

* Rename stragglers

* Fix alignment

* Rename OpCode class

* Missed a few

* Adjust alignment

1 files changed, 75 insertions, 0 deletions

diff --git a/ChocolArm64/Translation/ILOpCodeLoad.cs b/ChocolArm64/Translation/ILOpCodeLoad.cs
new file mode 100644
index 00000000..9dae10cc
--- /dev/null
+++ b/ChocolArm64/Translation/ILOpCodeLoad.cs
@@ -0,0 +1,75 @@
+using ChocolArm64.State;
+using System.Reflection.Emit;
+
+namespace ChocolArm64.Translation
+{
+    struct IlOpCodeLoad : IILEmit
+    {
+        public int Index { get; private set; }
+
+        public IoType IoType { get; private set; }
+
+        public RegisterSize RegisterSize { get; private set; }
+
+        public IlOpCodeLoad(int index, IoType ioType, RegisterSize registerSize = 0)
+        {
+            Index        = index;
+            IoType       = ioType;
+            RegisterSize = registerSize;
+        }
+
+        public void Emit(ILEmitter context)
+        {
+            switch (IoType)
+            {
+                case IoType.Arg: context.Generator.EmitLdarg(Index); break;
+
+                case IoType.Fields:
+                {
+                    long intInputs = context.LocalAlloc.GetIntInputs(context.GetIlBlock(Index));
+                    long vecInputs = context.LocalAlloc.GetVecInputs(context.GetIlBlock(Index));
+
+                    LoadLocals(context, intInputs, RegisterType.Int);
+                    LoadLocals(context, vecInputs, RegisterType.Vector);
+
+                    break;
+                }
+
+                case IoType.Flag:   EmitLdloc(context, Index, RegisterType.Flag);   break;
+                case IoType.Int:    EmitLdloc(context, Index, RegisterType.Int);    break;
+                case IoType.Vector: EmitLdloc(context, Index, RegisterType.Vector); break;
+            }
+        }
+
+        private void LoadLocals(ILEmitter context, long inputs, RegisterType baseType)
+        {
+            for (int bit = 0; bit < 64; bit++)
+            {
+                long mask = 1L << bit;
+
+                if ((inputs & mask) != 0)
+                {
+                    Register reg = ILEmitter.GetRegFromBit(bit, baseType);
+
+                    context.Generator.EmitLdarg(TranslatedSub.StateArgIdx);
+                    context.Generator.Emit(OpCodes.Ldfld, reg.GetField());
+
+                    context.Generator.EmitStloc(context.GetLocalIndex(reg));
+                }
+            }
+        }
+
+        private void EmitLdloc(ILEmitter context, int index, RegisterType registerType)
+        {
+            Register reg = new Register(index, registerType);
+
+            context.Generator.EmitLdloc(context.GetLocalIndex(reg));
+
+            if (registerType == RegisterType.Int &&
+                RegisterSize == RegisterSize.Int32)
+            {
+                context.Generator.Emit(OpCodes.Conv_U4);
+            }
+        }
+    }
+}
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