aboutsummaryrefslogtreecommitdiff
path: root/ChocolArm64/Translation/ILOpCodeLoad.cs
diff options
context:
space:
mode:
authorgdkchan <gab.dark.100@gmail.com>2018-12-10 22:58:52 -0200
committerGitHub <noreply@github.com>2018-12-10 22:58:52 -0200
commit36e8e074c90f11480389560e3f019a161f82efbe (patch)
treea187c1702feba371ff9be1b71491efc3dfcf9ed8 /ChocolArm64/Translation/ILOpCodeLoad.cs
parentf1529b1bc2bafbdadcf4d4643aa5716414097239 (diff)
Misc. CPU improvements (#519)
* Fix and simplify TranslatorCache * Fix some assignment alignments, remove some unused usings * Changes to ILEmitter, separate it from ILEmitterCtx * Rename ILEmitter to ILMethodBuilder * Rename LdrLit and *_Fix opcodes * Revert TranslatorCache impl to the more performant one, fix a few issues with it * Allow EmitOpCode to be called even after everything has been emitted * Make Emit and AdvanceOpCode private, simplify it a bit now that it starts emiting from the entry point * Remove unneeded temp use * Add missing exit call on TestExclusive * Use better hash * Implement the == and != operators
Diffstat (limited to 'ChocolArm64/Translation/ILOpCodeLoad.cs')
-rw-r--r--ChocolArm64/Translation/ILOpCodeLoad.cs37
1 files changed, 4 insertions, 33 deletions
diff --git a/ChocolArm64/Translation/ILOpCodeLoad.cs b/ChocolArm64/Translation/ILOpCodeLoad.cs
index 9dae10cc..c31e06bb 100644
--- a/ChocolArm64/Translation/ILOpCodeLoad.cs
+++ b/ChocolArm64/Translation/ILOpCodeLoad.cs
@@ -3,7 +3,7 @@ using System.Reflection.Emit;
namespace ChocolArm64.Translation
{
- struct IlOpCodeLoad : IILEmit
+ struct ILOpCodeLoad : IILEmit
{
public int Index { get; private set; }
@@ -11,55 +11,26 @@ namespace ChocolArm64.Translation
public RegisterSize RegisterSize { get; private set; }
- public IlOpCodeLoad(int index, IoType ioType, RegisterSize registerSize = 0)
+ public ILOpCodeLoad(int index, IoType ioType, RegisterSize registerSize = 0)
{
Index = index;
IoType = ioType;
RegisterSize = registerSize;
}
- public void Emit(ILEmitter context)
+ public void Emit(ILMethodBuilder context)
{
switch (IoType)
{
case IoType.Arg: context.Generator.EmitLdarg(Index); break;
- case IoType.Fields:
- {
- long intInputs = context.LocalAlloc.GetIntInputs(context.GetIlBlock(Index));
- long vecInputs = context.LocalAlloc.GetVecInputs(context.GetIlBlock(Index));
-
- LoadLocals(context, intInputs, RegisterType.Int);
- LoadLocals(context, vecInputs, RegisterType.Vector);
-
- break;
- }
-
case IoType.Flag: EmitLdloc(context, Index, RegisterType.Flag); break;
case IoType.Int: EmitLdloc(context, Index, RegisterType.Int); break;
case IoType.Vector: EmitLdloc(context, Index, RegisterType.Vector); break;
}
}
- private void LoadLocals(ILEmitter context, long inputs, RegisterType baseType)
- {
- for (int bit = 0; bit < 64; bit++)
- {
- long mask = 1L << bit;
-
- if ((inputs & mask) != 0)
- {
- Register reg = ILEmitter.GetRegFromBit(bit, baseType);
-
- context.Generator.EmitLdarg(TranslatedSub.StateArgIdx);
- context.Generator.Emit(OpCodes.Ldfld, reg.GetField());
-
- context.Generator.EmitStloc(context.GetLocalIndex(reg));
- }
- }
- }
-
- private void EmitLdloc(ILEmitter context, int index, RegisterType registerType)
+ private void EmitLdloc(ILMethodBuilder context, int index, RegisterType registerType)
{
Register reg = new Register(index, registerType);