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authorAlex Barney <thealexbarney@gmail.com>2018-10-30 19:43:02 -0600
committergdkchan <gab.dark.100@gmail.com>2018-10-30 22:43:02 -0300
commit9cb57fb4bb3bbae0ae052a5af4a96a49fc5d864d (patch)
tree0c97425aeb311c142bc92a6fcc503cb2c07d4376 /ChocolArm64/Translation/AILBlock.cs
parent5a87e58183578f5b84ca8d01cbb76aed11820f78 (diff)
Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
* Change naming convention for Ryujinx project * Change naming convention for ChocolArm64 project * Fix NaN * Remove unneeded this. from Ryujinx project * Adjust naming from new PRs * Name changes based on feedback * How did this get removed? * Rebasing fix * Change FP enum case * Remove prefix from ChocolArm64 classes - Part 1 * Remove prefix from ChocolArm64 classes - Part 2 * Fix alignment from last commit's renaming * Rename namespaces * Rename stragglers * Fix alignment * Rename OpCode class * Missed a few * Adjust alignment
Diffstat (limited to 'ChocolArm64/Translation/AILBlock.cs')
-rw-r--r--ChocolArm64/Translation/AILBlock.cs76
1 files changed, 0 insertions, 76 deletions
diff --git a/ChocolArm64/Translation/AILBlock.cs b/ChocolArm64/Translation/AILBlock.cs
deleted file mode 100644
index e580e09c..00000000
--- a/ChocolArm64/Translation/AILBlock.cs
+++ /dev/null
@@ -1,76 +0,0 @@
-using System.Collections.Generic;
-
-namespace ChocolArm64.Translation
-{
- class AILBlock : IAILEmit
- {
- public long IntInputs { get; private set; }
- public long IntOutputs { get; private set; }
- public long IntAwOutputs { get; private set; }
-
- public long VecInputs { get; private set; }
- public long VecOutputs { get; private set; }
- public long VecAwOutputs { get; private set; }
-
- public bool HasStateStore { get; private set; }
-
- public List<IAILEmit> ILEmitters { get; private set; }
-
- public AILBlock Next { get; set; }
- public AILBlock Branch { get; set; }
-
- public AILBlock()
- {
- ILEmitters = new List<IAILEmit>();
- }
-
- public void Add(IAILEmit ILEmitter)
- {
- if (ILEmitter is AILBarrier)
- {
- //Those barriers are used to separate the groups of CIL
- //opcodes emitted by each ARM instruction.
- //We can only consider the new outputs for doing input elimination
- //after all the CIL opcodes used by the instruction being emitted.
- IntAwOutputs = IntOutputs;
- VecAwOutputs = VecOutputs;
- }
- else if (ILEmitter is AILOpCodeLoad Ld && AILEmitter.IsRegIndex(Ld.Index))
- {
- switch (Ld.IoType)
- {
- case AIoType.Flag: IntInputs |= ((1L << Ld.Index) << 32) & ~IntAwOutputs; break;
- case AIoType.Int: IntInputs |= (1L << Ld.Index) & ~IntAwOutputs; break;
- case AIoType.Vector: VecInputs |= (1L << Ld.Index) & ~VecAwOutputs; break;
- }
- }
- else if (ILEmitter is AILOpCodeStore St)
- {
- if (AILEmitter.IsRegIndex(St.Index))
- {
- switch (St.IoType)
- {
- case AIoType.Flag: IntOutputs |= (1L << St.Index) << 32; break;
- case AIoType.Int: IntOutputs |= 1L << St.Index; break;
- case AIoType.Vector: VecOutputs |= 1L << St.Index; break;
- }
- }
-
- if (St.IoType == AIoType.Fields)
- {
- HasStateStore = true;
- }
- }
-
- ILEmitters.Add(ILEmitter);
- }
-
- public void Emit(AILEmitter Context)
- {
- foreach (IAILEmit ILEmitter in ILEmitters)
- {
- ILEmitter.Emit(Context);
- }
- }
- }
-} \ No newline at end of file