Add ARM32 support on the translator (#561)

* Remove ARM32 interpreter and add ARM32 support on the translator

* Nits.

* Rename Cond -> Condition

* Align code again

* Rename Data to Alu

* Enable ARM32 support and handle undefined instructions

* Use the IsThumb method to check if its a thumb opcode

* Remove another 32-bits check

1 files changed, 41 insertions, 0 deletions

diff --git a/ChocolArm64/State/RegisterAlias.cs b/ChocolArm64/State/RegisterAlias.cs
new file mode 100644
index 00000000..8c2b95d7
--- /dev/null
+++ b/ChocolArm64/State/RegisterAlias.cs
@@ -0,0 +1,41 @@
+namespace ChocolArm64.State
+{
+    static class RegisterAlias
+    {
+        public const int R8Usr  = 8;
+        public const int R9Usr  = 9;
+        public const int R10Usr = 10;
+        public const int R11Usr = 11;
+        public const int R12Usr = 12;
+        public const int SpUsr  = 13;
+        public const int LrUsr  = 14;
+
+        public const int SpHyp = 15;
+
+        public const int LrIrq = 16;
+        public const int SpIrq = 17;
+
+        public const int LrSvc = 18;
+        public const int SpSvc = 19;
+
+        public const int LrAbt = 20;
+        public const int SpAbt = 21;
+
+        public const int LrUnd = 22;
+        public const int SpUnd = 23;
+
+        public const int R8Fiq  = 24;
+        public const int R9Fiq  = 25;
+        public const int R10Fiq = 26;
+        public const int R11Fiq = 27;
+        public const int R12Fiq = 28;
+        public const int SpFiq  = 29;
+        public const int LrFiq  = 30;
+
+        public const int Aarch32Lr = 14;
+        public const int Aarch32Pc = 15;
+
+        public const int Lr = 30;
+        public const int Zr = 31;
+    }
+}
\ No newline at end of file