Misc. CPU improvements (#519)

* Fix and simplify TranslatorCache

* Fix some assignment alignments, remove some unused usings

* Changes to ILEmitter, separate it from ILEmitterCtx

* Rename ILEmitter to ILMethodBuilder

* Rename LdrLit and *_Fix opcodes

* Revert TranslatorCache impl to the more performant one, fix a few issues with it

* Allow EmitOpCode to be called even after everything has been emitted

* Make Emit and AdvanceOpCode private, simplify it a bit now that it starts emiting from the entry point

* Remove unneeded temp use

* Add missing exit call on TestExclusive

* Use better hash

* Implement the == and != operators

4 files changed, 6 insertions, 9 deletions

diff --git a/ChocolArm64/Instructions/InstEmitException.cs b/ChocolArm64/Instructions/InstEmitException.cs
index 8325a397..9444397a 100644
--- a/ChocolArm64/Instructions/InstEmitException.cs
+++ b/ChocolArm64/Instructions/InstEmitException.cs
@@ -48,7 +48,7 @@ namespace ChocolArm64.Instructions
 
             if (context.CurrBlock.Next != null)
             {
-                context.EmitLoadState(context.CurrBlock.Next);
+                context.EmitLoadState();
             }
             else
             {
@@ -73,7 +73,7 @@ namespace ChocolArm64.Instructions
 
             if (context.CurrBlock.Next != null)
             {
-                context.EmitLoadState(context.CurrBlock.Next);
+                context.EmitLoadState();
             }
             else
             {
diff --git a/ChocolArm64/Instructions/InstEmitFlow.cs b/ChocolArm64/Instructions/InstEmitFlow.cs
index 0e9f7cb0..758bf212 100644
--- a/ChocolArm64/Instructions/InstEmitFlow.cs
+++ b/ChocolArm64/Instructions/InstEmitFlow.cs
@@ -58,7 +58,7 @@ namespace ChocolArm64.Instructions
 
                 context.Emit(OpCodes.Pop);
 
-                context.EmitLoadState(context.CurrBlock.Next);
+                context.EmitLoadState();
             }
             else
             {
@@ -73,13 +73,10 @@ namespace ChocolArm64.Instructions
             OpCodeBReg64 op = (OpCodeBReg64)context.CurrOp;
 
             context.EmitLdintzr(op.Rn);
-            context.EmitSttmp();
-
             context.EmitLdc_I(op.Position + 4);
             context.EmitStint(CpuThreadState.LrIndex);
             context.EmitStoreState();
 
-            context.EmitLdtmp();
             context.Emit(OpCodes.Ret);
         }
 
diff --git a/ChocolArm64/Instructions/InstEmitMemory.cs b/ChocolArm64/Instructions/InstEmitMemory.cs
index 96e45b3f..96f782df 100644
--- a/ChocolArm64/Instructions/InstEmitMemory.cs
+++ b/ChocolArm64/Instructions/InstEmitMemory.cs
@@ -60,7 +60,7 @@ namespace ChocolArm64.Instructions
             EmitWBackIfNeeded(context);
         }
 
-        public static void LdrLit(ILEmitterCtx context)
+        public static void Ldr_Literal(ILEmitterCtx context)
         {
             IOpCodeLit64 op = (IOpCodeLit64)context.CurrOp;
 
diff --git a/ChocolArm64/Instructions/InstEmitSimdCvt.cs b/ChocolArm64/Instructions/InstEmitSimdCvt.cs
index fe8722af..fd6146b3 100644
--- a/ChocolArm64/Instructions/InstEmitSimdCvt.cs
+++ b/ChocolArm64/Instructions/InstEmitSimdCvt.cs
@@ -244,7 +244,7 @@ namespace ChocolArm64.Instructions
             EmitFcvt_s_Gp(context, () => { });
         }
 
-        public static void Fcvtzs_Gp_Fix(ILEmitterCtx context)
+        public static void Fcvtzs_Gp_Fixed(ILEmitterCtx context)
         {
             EmitFcvtzs_Gp_Fix(context);
         }
@@ -264,7 +264,7 @@ namespace ChocolArm64.Instructions
             EmitFcvt_u_Gp(context, () => { });
         }
 
-        public static void Fcvtzu_Gp_Fix(ILEmitterCtx context)
+        public static void Fcvtzu_Gp_Fixed(ILEmitterCtx context)
         {
             EmitFcvtzu_Gp_Fix(context);
         }