Add ARM32 support on the translator (#561)

* Remove ARM32 interpreter and add ARM32 support on the translator

* Nits.

* Rename Cond -> Condition

* Align code again

* Rename Data to Alu

* Enable ARM32 support and handle undefined instructions

* Use the IsThumb method to check if its a thumb opcode

* Remove another 32-bits check

3 files changed, 0 insertions, 142 deletions

diff --git a/ChocolArm64/Instructions32/A32InstInterpretAlu.cs b/ChocolArm64/Instructions32/A32InstInterpretAlu.cs
deleted file mode 100644
index f3be823f..00000000
--- a/ChocolArm64/Instructions32/A32InstInterpretAlu.cs
+++ /dev/null
@@ -1,7 +0,0 @@
-namespace ChocolArm64.Instructions32
-{
-    static partial class A32InstInterpret
-    {
-
-    }
-}
\ No newline at end of file
diff --git a/ChocolArm64/Instructions32/A32InstInterpretFlow.cs b/ChocolArm64/Instructions32/A32InstInterpretFlow.cs
deleted file mode 100644
index cdf7e4c6..00000000
--- a/ChocolArm64/Instructions32/A32InstInterpretFlow.cs
+++ /dev/null
@@ -1,70 +0,0 @@
-using ChocolArm64.Decoders;
-using ChocolArm64.Decoders32;
-using ChocolArm64.Memory;
-using ChocolArm64.State;
-
-using static ChocolArm64.Instructions32.A32InstInterpretHelper;
-
-namespace ChocolArm64.Instructions32
-{
-    static partial class A32InstInterpret
-    {
-        public static void B(CpuThreadState state, MemoryManager memory, OpCode64 opCode)
-        {
-            A32OpCodeBImmAl op = (A32OpCodeBImmAl)opCode;
-
-            if (IsConditionTrue(state, op.Cond))
-            {
-                BranchWritePc(state, GetPc(state) + (uint)op.Imm);
-            }
-        }
-
-        public static void Bl(CpuThreadState state, MemoryManager memory, OpCode64 opCode)
-        {
-            Blx(state, memory, opCode, false);
-        }
-
-        public static void Blx(CpuThreadState state, MemoryManager memory, OpCode64 opCode)
-        {
-            Blx(state, memory, opCode, true);
-        }
-
-        public static void Blx(CpuThreadState state, MemoryManager memory, OpCode64 opCode, bool x)
-        {
-            A32OpCodeBImmAl op = (A32OpCodeBImmAl)opCode;
-
-            if (IsConditionTrue(state, op.Cond))
-            {
-                uint pc = GetPc(state);
-
-                if (state.Thumb)
-                {
-                    state.R14 = pc | 1;
-                }
-                else
-                {
-                    state.R14 = pc - 4U;
-                }
-
-                if (x)
-                {
-                    state.Thumb = !state.Thumb;
-                }
-
-                if (!state.Thumb)
-                {
-                    pc &= ~3U;
-                }
-
-                BranchWritePc(state, pc + (uint)op.Imm);
-            }
-        }
-
-        private static void BranchWritePc(CpuThreadState state, uint pc)
-        {
-            state.R15 = state.Thumb
-                ? pc & ~1U
-                : pc & ~3U;
-        }
-    }
-}
\ No newline at end of file
diff --git a/ChocolArm64/Instructions32/A32InstInterpretHelper.cs b/ChocolArm64/Instructions32/A32InstInterpretHelper.cs
deleted file mode 100644
index b08e1298..00000000
--- a/ChocolArm64/Instructions32/A32InstInterpretHelper.cs
+++ /dev/null
@@ -1,65 +0,0 @@
-using ChocolArm64.Decoders;
-using ChocolArm64.State;
-using System;
-
-namespace ChocolArm64.Instructions32
-{
-    static class A32InstInterpretHelper
-    {
-        public static bool IsConditionTrue(CpuThreadState state, Cond cond)
-        {
-            switch (cond)
-            {
-                case Cond.Eq:   return  state.Zero;
-                case Cond.Ne:   return !state.Zero;
-                case Cond.GeUn: return  state.Carry;
-                case Cond.LtUn: return !state.Carry;
-                case Cond.Mi:   return  state.Negative;
-                case Cond.Pl:   return !state.Negative;
-                case Cond.Vs:   return  state.Overflow;
-                case Cond.Vc:   return !state.Overflow;
-                case Cond.GtUn: return  state.Carry    && !state.Zero;
-                case Cond.LeUn: return !state.Carry    &&  state.Zero;
-                case Cond.Ge:   return  state.Negative ==  state.Overflow;
-                case Cond.Lt:   return  state.Negative !=  state.Overflow;
-                case Cond.Gt:   return  state.Negative ==  state.Overflow && !state.Zero;
-                case Cond.Le:   return  state.Negative !=  state.Overflow &&  state.Zero;
-            }
-
-            return true;
-        }
-
-        public unsafe static uint GetReg(CpuThreadState state, int reg)
-        {
-            if ((uint)reg > 15)
-            {
-                throw new ArgumentOutOfRangeException(nameof(reg));
-            }
-
-            fixed (uint* ptr = &state.R0)
-            {
-                return *(ptr + reg);
-            }
-        }
-
-        public unsafe static void SetReg(CpuThreadState state, int reg, uint value)
-        {
-            if ((uint)reg > 15)
-            {
-                throw new ArgumentOutOfRangeException(nameof(reg));
-            }
-
-            fixed (uint* ptr = &state.R0)
-            {
-                *(ptr + reg) = value;
-            }
-        }
-
-        public static uint GetPc(CpuThreadState state)
-        {
-            //Due to the old fetch-decode-execute pipeline of old ARM CPUs,
-            //the PC is 4 or 8 bytes (2 instructions) ahead of the current instruction.
-            return state.R15 + (state.Thumb ? 2U : 4U);
-        }
-    }
-}
\ No newline at end of file