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authorgdkchan <gab.dark.100@gmail.com>2018-02-25 22:14:58 -0300
committergdkchan <gab.dark.100@gmail.com>2018-02-25 22:14:58 -0300
commit950011c90fe28fe9edd8ebe0d0a771f6adcff7a1 (patch)
tree407416f5ee2a157d06ce2fa267671b7e2d1e0946 /ChocolArm64/Instruction
parente174100474fcfe484cc8e93c4db447886096615d (diff)
Added initial support for function names from symbol table on the cpu with tracing, fix wrong ImageEnd on executables with MOD0, fix issue on the CPU on input elimination for instruction with more than one register store
Diffstat (limited to 'ChocolArm64/Instruction')
-rw-r--r--ChocolArm64/Instruction/AInstEmitCsel.cs5
1 files changed, 2 insertions, 3 deletions
diff --git a/ChocolArm64/Instruction/AInstEmitCsel.cs b/ChocolArm64/Instruction/AInstEmitCsel.cs
index 33080980..21876752 100644
--- a/ChocolArm64/Instruction/AInstEmitCsel.cs
+++ b/ChocolArm64/Instruction/AInstEmitCsel.cs
@@ -44,16 +44,15 @@ namespace ChocolArm64.Instruction
Context.Emit(OpCodes.Neg);
}
- Context.EmitStintzr(Op.Rd);
-
Context.Emit(OpCodes.Br_S, LblEnd);
Context.MarkLabel(LblTrue);
Context.EmitLdintzr(Op.Rn);
- Context.EmitStintzr(Op.Rd);
Context.MarkLabel(LblEnd);
+
+ Context.EmitStintzr(Op.Rd);
}
}
} \ No newline at end of file