diff options
| author | Alex Barney <thealexbarney@gmail.com> | 2018-10-30 19:43:02 -0600 |
|---|---|---|
| committer | gdkchan <gab.dark.100@gmail.com> | 2018-10-30 22:43:02 -0300 |
| commit | 9cb57fb4bb3bbae0ae052a5af4a96a49fc5d864d (patch) | |
| tree | 0c97425aeb311c142bc92a6fcc503cb2c07d4376 /ChocolArm64/Instruction32 | |
| parent | 5a87e58183578f5b84ca8d01cbb76aed11820f78 (diff) | |
Adjust naming conventions for Ryujinx and ChocolArm64 projects (#484)
* Change naming convention for Ryujinx project
* Change naming convention for ChocolArm64 project
* Fix NaN
* Remove unneeded this. from Ryujinx project
* Adjust naming from new PRs
* Name changes based on feedback
* How did this get removed?
* Rebasing fix
* Change FP enum case
* Remove prefix from ChocolArm64 classes - Part 1
* Remove prefix from ChocolArm64 classes - Part 2
* Fix alignment from last commit's renaming
* Rename namespaces
* Rename stragglers
* Fix alignment
* Rename OpCode class
* Missed a few
* Adjust alignment
Diffstat (limited to 'ChocolArm64/Instruction32')
| -rw-r--r-- | ChocolArm64/Instruction32/A32InstInterpretAlu.cs | 7 | ||||
| -rw-r--r-- | ChocolArm64/Instruction32/A32InstInterpretFlow.cs | 70 | ||||
| -rw-r--r-- | ChocolArm64/Instruction32/A32InstInterpretHelper.cs | 65 |
3 files changed, 0 insertions, 142 deletions
diff --git a/ChocolArm64/Instruction32/A32InstInterpretAlu.cs b/ChocolArm64/Instruction32/A32InstInterpretAlu.cs deleted file mode 100644 index 41b9d22a..00000000 --- a/ChocolArm64/Instruction32/A32InstInterpretAlu.cs +++ /dev/null @@ -1,7 +0,0 @@ -namespace ChocolArm64.Instruction32 -{ - static partial class A32InstInterpret - { - - } -}
\ No newline at end of file diff --git a/ChocolArm64/Instruction32/A32InstInterpretFlow.cs b/ChocolArm64/Instruction32/A32InstInterpretFlow.cs deleted file mode 100644 index 223fd186..00000000 --- a/ChocolArm64/Instruction32/A32InstInterpretFlow.cs +++ /dev/null @@ -1,70 +0,0 @@ -using ChocolArm64.Decoder; -using ChocolArm64.Decoder32; -using ChocolArm64.Memory; -using ChocolArm64.State; - -using static ChocolArm64.Instruction32.A32InstInterpretHelper; - -namespace ChocolArm64.Instruction32 -{ - static partial class A32InstInterpret - { - public static void B(AThreadState State, AMemory Memory, AOpCode OpCode) - { - A32OpCodeBImmAl Op = (A32OpCodeBImmAl)OpCode; - - if (IsConditionTrue(State, Op.Cond)) - { - BranchWritePc(State, GetPc(State) + (uint)Op.Imm); - } - } - - public static void Bl(AThreadState State, AMemory Memory, AOpCode OpCode) - { - Blx(State, Memory, OpCode, false); - } - - public static void Blx(AThreadState State, AMemory Memory, AOpCode OpCode) - { - Blx(State, Memory, OpCode, true); - } - - public static void Blx(AThreadState State, AMemory Memory, AOpCode OpCode, bool X) - { - A32OpCodeBImmAl Op = (A32OpCodeBImmAl)OpCode; - - if (IsConditionTrue(State, Op.Cond)) - { - uint Pc = GetPc(State); - - if (State.Thumb) - { - State.R14 = Pc | 1; - } - else - { - State.R14 = Pc - 4U; - } - - if (X) - { - State.Thumb = !State.Thumb; - } - - if (!State.Thumb) - { - Pc &= ~3U; - } - - BranchWritePc(State, Pc + (uint)Op.Imm); - } - } - - private static void BranchWritePc(AThreadState State, uint Pc) - { - State.R15 = State.Thumb - ? Pc & ~1U - : Pc & ~3U; - } - } -}
\ No newline at end of file diff --git a/ChocolArm64/Instruction32/A32InstInterpretHelper.cs b/ChocolArm64/Instruction32/A32InstInterpretHelper.cs deleted file mode 100644 index 9c3c098e..00000000 --- a/ChocolArm64/Instruction32/A32InstInterpretHelper.cs +++ /dev/null @@ -1,65 +0,0 @@ -using ChocolArm64.Decoder; -using ChocolArm64.State; -using System; - -namespace ChocolArm64.Instruction32 -{ - static class A32InstInterpretHelper - { - public static bool IsConditionTrue(AThreadState State, ACond Cond) - { - switch (Cond) - { - case ACond.Eq: return State.Zero; - case ACond.Ne: return !State.Zero; - case ACond.Ge_Un: return State.Carry; - case ACond.Lt_Un: return !State.Carry; - case ACond.Mi: return State.Negative; - case ACond.Pl: return !State.Negative; - case ACond.Vs: return State.Overflow; - case ACond.Vc: return !State.Overflow; - case ACond.Gt_Un: return State.Carry && !State.Zero; - case ACond.Le_Un: return !State.Carry && State.Zero; - case ACond.Ge: return State.Negative == State.Overflow; - case ACond.Lt: return State.Negative != State.Overflow; - case ACond.Gt: return State.Negative == State.Overflow && !State.Zero; - case ACond.Le: return State.Negative != State.Overflow && State.Zero; - } - - return true; - } - - public unsafe static uint GetReg(AThreadState State, int Reg) - { - if ((uint)Reg > 15) - { - throw new ArgumentOutOfRangeException(nameof(Reg)); - } - - fixed (uint* Ptr = &State.R0) - { - return *(Ptr + Reg); - } - } - - public unsafe static void SetReg(AThreadState State, int Reg, uint Value) - { - if ((uint)Reg > 15) - { - throw new ArgumentOutOfRangeException(nameof(Reg)); - } - - fixed (uint* Ptr = &State.R0) - { - *(Ptr + Reg) = Value; - } - } - - public static uint GetPc(AThreadState State) - { - //Due to the old fetch-decode-execute pipeline of old ARM CPUs, - //the PC is 4 or 8 bytes (2 instructions) ahead of the current instruction. - return State.R15 + (State.Thumb ? 2U : 4U); - } - } -}
\ No newline at end of file |
