diff options
| author | gdkchan <gab.dark.100@gmail.com> | 2018-03-30 12:37:07 -0300 |
|---|---|---|
| committer | gdkchan <gab.dark.100@gmail.com> | 2018-03-30 12:37:07 -0300 |
| commit | 9b6fa1f89e7e1cac47e28bb64e626dff5263e953 (patch) | |
| tree | 05ec5867242115f050396644c2a8f2ef99239c5b /ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs | |
| parent | f48f5e3f5bef222d1009d10d6f4493685797e2f9 (diff) | |
Add UHADD instruction
Diffstat (limited to 'ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs')
| -rw-r--r-- | ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs | 24 |
1 files changed, 18 insertions, 6 deletions
diff --git a/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs b/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs index f06f0b37..cd4d31f9 100644 --- a/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs +++ b/ChocolArm64/Instruction/AInstEmitSimdArithmetic.cs @@ -247,7 +247,7 @@ namespace ChocolArm64.Instruction AOpCodeSimdReg Op = (AOpCodeSimdReg)Context.CurrOp; int SizeF = Op.Size & 1; - + EmitVectorExtractF(Context, Op.Rn, 0, SizeF); EmitVectorExtractF(Context, Op.Rm, 0, SizeF); @@ -316,7 +316,7 @@ namespace ChocolArm64.Instruction public static void Frinti_V(AILEmitterCtx Context) { AOpCodeSimd Op = (AOpCodeSimd)Context.CurrOp; - + EmitVectorUnaryOpF(Context, () => { Context.EmitLdarg(ATranslatedSub.StateArgIdx); @@ -324,11 +324,11 @@ namespace ChocolArm64.Instruction Context.EmitCallPropGet(typeof(AThreadState), nameof(AThreadState.Fpcr)); if (Op.Size == 2) - { + { ASoftFallback.EmitCall(Context, nameof(ASoftFallback.RoundF)); } else if (Op.Size == 3) - { + { ASoftFallback.EmitCall(Context, nameof(ASoftFallback.Round)); } else @@ -425,11 +425,11 @@ namespace ChocolArm64.Instruction Context.EmitCallPropGet(typeof(AThreadState), nameof(AThreadState.Fpcr)); if (Op.Size == 0) - { + { ASoftFallback.EmitCall(Context, nameof(ASoftFallback.RoundF)); } else if (Op.Size == 1) - { + { ASoftFallback.EmitCall(Context, nameof(ASoftFallback.Round)); } else @@ -569,6 +569,18 @@ namespace ChocolArm64.Instruction EmitVectorWidenRmBinaryOpZx(Context, () => Context.Emit(OpCodes.Add)); } + public static void Uhadd_V(AILEmitterCtx Context) + { + EmitVectorBinaryOpZx(Context, () => + { + Context.Emit(OpCodes.Add); + + Context.EmitLdc_I4(1); + + Context.Emit(OpCodes.Shr_Un); + }); + } + public static void Umull_V(AILEmitterCtx Context) { EmitVectorWidenRnRmBinaryOpZx(Context, () => Context.Emit(OpCodes.Mul)); |
