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authorgdkchan <gab.dark.100@gmail.com>2018-12-10 22:58:52 -0200
committerGitHub <noreply@github.com>2018-12-10 22:58:52 -0200
commit36e8e074c90f11480389560e3f019a161f82efbe (patch)
treea187c1702feba371ff9be1b71491efc3dfcf9ed8 /ChocolArm64/Decoders/OpCodeSimdImm64.cs
parentf1529b1bc2bafbdadcf4d4643aa5716414097239 (diff)
Misc. CPU improvements (#519)
* Fix and simplify TranslatorCache * Fix some assignment alignments, remove some unused usings * Changes to ILEmitter, separate it from ILEmitterCtx * Rename ILEmitter to ILMethodBuilder * Rename LdrLit and *_Fix opcodes * Revert TranslatorCache impl to the more performant one, fix a few issues with it * Allow EmitOpCode to be called even after everything has been emitted * Make Emit and AdvanceOpCode private, simplify it a bit now that it starts emiting from the entry point * Remove unneeded temp use * Add missing exit call on TestExclusive * Use better hash * Implement the == and != operators
Diffstat (limited to 'ChocolArm64/Decoders/OpCodeSimdImm64.cs')
-rw-r--r--ChocolArm64/Decoders/OpCodeSimdImm64.cs5
1 files changed, 2 insertions, 3 deletions
diff --git a/ChocolArm64/Decoders/OpCodeSimdImm64.cs b/ChocolArm64/Decoders/OpCodeSimdImm64.cs
index 3ef6a8c6..37ee504d 100644
--- a/ChocolArm64/Decoders/OpCodeSimdImm64.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdImm64.cs
@@ -1,5 +1,4 @@
using ChocolArm64.Instructions;
-using ChocolArm64.State;
namespace ChocolArm64.Decoders
{
@@ -61,12 +60,12 @@ namespace ChocolArm64.Decoders
else if ((modeHigh & 0b110) == 0b100)
{
//16-bits shifted Immediate.
- Size = 1; imm <<= (modeHigh & 1) << 3;
+ Size = 1; imm <<= (modeHigh & 1) << 3;
}
else if ((modeHigh & 0b100) == 0b000)
{
//32-bits shifted Immediate.
- Size = 2; imm <<= modeHigh << 3;
+ Size = 2; imm <<= modeHigh << 3;
}
else if ((modeHigh & 0b111) == 0b110)
{