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authorgdkchan <gab.dark.100@gmail.com>2019-02-23 20:52:48 -0300
committerGitHub <noreply@github.com>2019-02-23 20:52:48 -0300
commit9679896b9471afdebf860c016d3fd360b9af7f80 (patch)
tree8b122155dbe528db1aa9237be185f0ddf6fefbaf /ChocolArm64/Decoders/OpCodeSimdCvt64.cs
parent7ed2b4cc39ca286a03589cd3768a419c5ed9941f (diff)
Implement fixed-point variant of the UCVTF and SCVTF instructions (#578)
* Add fixed-point variant of the UCVTF instruction * Change encoding of some fixed-point instructions to not allow invalid encodings * Fix Fcvtzu_Gp_Fixed encoding * Add SCVTF (fixed-point GP to Scalar) instruction * Simplify *Fixed encodings
Diffstat (limited to 'ChocolArm64/Decoders/OpCodeSimdCvt64.cs')
-rw-r--r--ChocolArm64/Decoders/OpCodeSimdCvt64.cs9
1 files changed, 0 insertions, 9 deletions
diff --git a/ChocolArm64/Decoders/OpCodeSimdCvt64.cs b/ChocolArm64/Decoders/OpCodeSimdCvt64.cs
index eacd5940..3181a85a 100644
--- a/ChocolArm64/Decoders/OpCodeSimdCvt64.cs
+++ b/ChocolArm64/Decoders/OpCodeSimdCvt64.cs
@@ -8,18 +8,9 @@ namespace ChocolArm64.Decoders
public OpCodeSimdCvt64(Inst inst, long position, int opCode) : base(inst, position, opCode)
{
- //TODO:
- //Und of Fixed Point variants.
int scale = (opCode >> 10) & 0x3f;
int sf = (opCode >> 31) & 0x1;
- /*if (Type != SF && !(Type == 2 && SF == 1))
- {
- Emitter = AInstEmit.Und;
-
- return;
- }*/
-
FBits = 64 - scale;
RegisterSize = sf != 0