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authorgdkchan <gab.dark.100@gmail.com>2019-01-24 23:59:53 -0200
committerGitHub <noreply@github.com>2019-01-24 23:59:53 -0200
commit36b9ab0e48b6893c057a954e1ef3181b452add1c (patch)
tree16a4ae56019b55d0cb61f1aa105481933ada733e /ChocolArm64/Decoders/OpCodeBImmCond64.cs
parent72157e03eb09d4fb5d6d004efc2d13d3194e8c90 (diff)
Add ARM32 support on the translator (#561)
* Remove ARM32 interpreter and add ARM32 support on the translator * Nits. * Rename Cond -> Condition * Align code again * Rename Data to Alu * Enable ARM32 support and handle undefined instructions * Use the IsThumb method to check if its a thumb opcode * Remove another 32-bits check
Diffstat (limited to 'ChocolArm64/Decoders/OpCodeBImmCond64.cs')
-rw-r--r--ChocolArm64/Decoders/OpCodeBImmCond64.cs4
1 files changed, 2 insertions, 2 deletions
diff --git a/ChocolArm64/Decoders/OpCodeBImmCond64.cs b/ChocolArm64/Decoders/OpCodeBImmCond64.cs
index 22702309..ca7df554 100644
--- a/ChocolArm64/Decoders/OpCodeBImmCond64.cs
+++ b/ChocolArm64/Decoders/OpCodeBImmCond64.cs
@@ -4,7 +4,7 @@ namespace ChocolArm64.Decoders
{
class OpCodeBImmCond64 : OpCodeBImm64, IOpCodeCond64
{
- public Cond Cond { get; private set; }
+ public Condition Cond { get; private set; }
public OpCodeBImmCond64(Inst inst, long position, int opCode) : base(inst, position, opCode)
{
@@ -17,7 +17,7 @@ namespace ChocolArm64.Decoders
return;
}
- Cond = (Cond)(opCode & 0xf);
+ Cond = (Condition)(opCode & 0xf);
Imm = position + DecoderHelper.DecodeImmS19_2(opCode);
}