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authorgdkchan <gab.dark.100@gmail.com>2019-01-29 13:06:11 -0300
committerGitHub <noreply@github.com>2019-01-29 13:06:11 -0300
commitc1bdf19061ec679aa3c69eda2a41337e3e809014 (patch)
treef3813b8df8ff8dd1fbf73fd085893b0df21850dc /ChocolArm64/Decoders/OpCode32Mem.cs
parent8f7fcede7fa98c605925dc7b9316940960543bf1 (diff)
Implement some ARM32 memory instructions and CMP (#565)
* Implement ARM32 memory instructions: LDM, LDR, LDRB, LDRD, LDRH, LDRSB, LDRSH, STM, STR, STRB, STRD, STRH (immediate and register + immediate variants), implement CMP (immediate and register shifted by immediate variants) * Rename some opcode classes and flag masks for consistency * Fix a few suboptimal ARM32 codegen issues, only loads should be considered on decoder when checking if Rt == PC, and only NZCV flags should be considered for comparison optimizations * Take into account Rt2 for LDRD instructions aswell when checking if the instruction changes PC * Re-align arm32 instructions on the opcode table
Diffstat (limited to 'ChocolArm64/Decoders/OpCode32Mem.cs')
-rw-r--r--ChocolArm64/Decoders/OpCode32Mem.cs37
1 files changed, 37 insertions, 0 deletions
diff --git a/ChocolArm64/Decoders/OpCode32Mem.cs b/ChocolArm64/Decoders/OpCode32Mem.cs
new file mode 100644
index 00000000..ed648a5f
--- /dev/null
+++ b/ChocolArm64/Decoders/OpCode32Mem.cs
@@ -0,0 +1,37 @@
+using ChocolArm64.Instructions;
+
+namespace ChocolArm64.Decoders
+{
+ class OpCode32Mem : OpCode32, IOpCode32Mem
+ {
+ public int Rt { get; private set; }
+ public int Rn { get; private set; }
+
+ public int Imm { get; protected set; }
+
+ public bool Index { get; private set; }
+ public bool Add { get; private set; }
+ public bool WBack { get; private set; }
+ public bool Unprivileged { get; private set; }
+
+ public bool IsLoad { get; private set; }
+
+ public OpCode32Mem(Inst inst, long position, int opCode) : base(inst, position, opCode)
+ {
+ Rt = (opCode >> 12) & 0xf;
+ Rn = (opCode >> 16) & 0xf;
+
+ bool isLoad = (opCode & (1 << 20)) != 0;
+ bool w = (opCode & (1 << 21)) != 0;
+ bool u = (opCode & (1 << 23)) != 0;
+ bool p = (opCode & (1 << 24)) != 0;
+
+ Index = p;
+ Add = u;
+ WBack = !p || w;
+ Unprivileged = !p && w;
+
+ IsLoad = isLoad || inst.Emitter == InstEmit32.Ldrd;
+ }
+ }
+} \ No newline at end of file