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| author | LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com> | 2018-09-01 16:52:51 +0200 |
|---|---|---|
| committer | gdkchan <gab.dark.100@gmail.com> | 2018-09-01 11:52:51 -0300 |
| commit | 42e4e02a648812c4dee1574a5cd9e7dddf7b2458 (patch) | |
| tree | e5d4992e36bf17255d82690388ff4d185faf676f /ChocolArm64/Decoder/AOpCodeSimdShImm.cs | |
| parent | 326777ca4a68b38c7a5e44c76291f09f07ddcf2e (diff) | |
Add Fcvtns_S, Fcvtns_V, Fcvtnu_S, Fcvtnu_V (AOpCodeSimd) FP & Umlal_V, Umlsl_V, Saddl_V, Ssubl_V, Usubl_V instructions; add 8 FP & 16 S/Umlal_V, S/Umlsl_V, S/Uaddl_V, S/Usubl_V Tests. (#390)
* Update AOpCodeTable.cs
* Update AInstEmitSimdCvt.cs
* Update Pseudocode.cs
* Update Instructions.cs
* Update CpuTestSimd.cs
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update Instructions.cs
* Update CpuTestSimdReg.cs
* Update CpuTestSimd.cs
* Update AOpCodeTable.cs
* Update AInstEmitSimdArithmetic.cs
* Update Instructions.cs
* Update CpuTestSimdReg.cs
* Add QCFlagBit.
* Add QCFlagBit.
Diffstat (limited to 'ChocolArm64/Decoder/AOpCodeSimdShImm.cs')
0 files changed, 0 insertions, 0 deletions