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| author | gdkchan <gab.dark.100@gmail.com> | 2018-07-14 13:13:02 -0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-07-14 13:13:02 -0300 |
| commit | 514218ab98acc1f0ace2e2cc0b8c1091ffccc6ce (patch) | |
| tree | ce7c44f11aa1dad7143678b2444bc297b98e5bff /ChocolArm64/Decoder/AOpCodeSimdMemPair.cs | |
| parent | 2f37583ab3b49aa5064a72c8d3b4e8245ebb6b5b (diff) | |
Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions, nits (#225)
* Add SMLSL, SQRSHRN and SRSHR (Vector) cpu instructions
* Address PR feedback
* Address PR feedback
* Remove another useless temp var
* nit: Alignment
* Replace Context.CurrOp.GetBitsCount() with Op.GetBitsCount()
* Fix encodings and move flag bit test out of the loop
Diffstat (limited to 'ChocolArm64/Decoder/AOpCodeSimdMemPair.cs')
0 files changed, 0 insertions, 0 deletions