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authorLDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com>2018-07-03 08:31:16 +0200
committergdkchan <gab.dark.100@gmail.com>2018-07-03 03:31:16 -0300
commitc228cf320d476303da679066c67c3a8c9c6aa3e1 (patch)
tree1ccab1be1ef348cef8642575a116bc5b2e741c18 /ChocolArm64/AOpCodeTable.cs
parentd24ea0d51b988195f5d3cf8c1194cb012067fa9d (diff)
Add Rbit_V instruction. Add 8 tests (Rbit_V; Rev16_V, Rev32_V, Rev64_V). Improve CountSetBits8() algorithm. (#212)
* Update AOpCodeTable.cs * Update AInstEmitSimdArithmetic.cs * Update AInstEmitSimdLogical.cs * Update AVectorHelper.cs * Update ASoftFallback.cs * Update Instructions.cs * Update CpuTestSimd.cs * Update CpuTestSimdReg.cs * Improve CountSetBits8() algorithm. * Improve CountSetBits8() algorithm.
Diffstat (limited to 'ChocolArm64/AOpCodeTable.cs')
-rw-r--r--ChocolArm64/AOpCodeTable.cs1
1 files changed, 1 insertions, 0 deletions
diff --git a/ChocolArm64/AOpCodeTable.cs b/ChocolArm64/AOpCodeTable.cs
index 09a6ca4a..7cef4398 100644
--- a/ChocolArm64/AOpCodeTable.cs
+++ b/ChocolArm64/AOpCodeTable.cs
@@ -348,6 +348,7 @@ namespace ChocolArm64
SetA64("0x001110101xxxxx000111xxxxxxxxxx", AInstEmit.Orr_V, typeof(AOpCodeSimdReg));
SetA64("0x00111100000xxx<<x101xxxxxxxxxx", AInstEmit.Orr_Vi, typeof(AOpCodeSimdImm));
SetA64("0x101110<<1xxxxx010000xxxxxxxxxx", AInstEmit.Raddhn_V, typeof(AOpCodeSimdReg));
+ SetA64("0x10111001100000010110xxxxxxxxxx", AInstEmit.Rbit_V, typeof(AOpCodeSimd));
SetA64("0x00111000100000000110xxxxxxxxxx", AInstEmit.Rev16_V, typeof(AOpCodeSimd));
SetA64("0x1011100x100000000010xxxxxxxxxx", AInstEmit.Rev32_V, typeof(AOpCodeSimd));
SetA64("0x001110<<100000000010xxxxxxxxxx", AInstEmit.Rev64_V, typeof(AOpCodeSimd));