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| author | gdkchan <gab.dark.100@gmail.com> | 2018-09-22 17:26:18 -0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2018-09-22 17:26:18 -0300 |
| commit | 54ed9096bd4add5cf2ca320123f551f60c06a57f (patch) | |
| tree | 6d6eeb599a9a0932ef50a42c9ad4646473c7db35 /ChocolArm64/AOpCodeTable.cs | |
| parent | a76660eac58d6f3cc7ad3118edab39e42467909f (diff) | |
Add FMAXP and FMINP (Vector) instructions on the CPU (#412)
* Add FMAXP and FMINP (Vector) instructions on the CPU
* Address PR feedback
Diffstat (limited to 'ChocolArm64/AOpCodeTable.cs')
| -rw-r--r-- | ChocolArm64/AOpCodeTable.cs | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/ChocolArm64/AOpCodeTable.cs b/ChocolArm64/AOpCodeTable.cs index fe3dce41..6404e14f 100644 --- a/ChocolArm64/AOpCodeTable.cs +++ b/ChocolArm64/AOpCodeTable.cs @@ -278,10 +278,12 @@ namespace ChocolArm64 SetA64("0>0011100<1xxxxx111101xxxxxxxxxx", AInstEmit.Fmax_V, typeof(AOpCodeSimdReg)); SetA64("000111100x1xxxxx011010xxxxxxxxxx", AInstEmit.Fmaxnm_S, typeof(AOpCodeSimdReg)); SetA64("0>0011100<1xxxxx110001xxxxxxxxxx", AInstEmit.Fmaxnm_V, typeof(AOpCodeSimdReg)); + SetA64("0>1011100<1xxxxx111101xxxxxxxxxx", AInstEmit.Fmaxp_V, typeof(AOpCodeSimdReg)); SetA64("000111100x1xxxxx010110xxxxxxxxxx", AInstEmit.Fmin_S, typeof(AOpCodeSimdReg)); SetA64("0>0011101<1xxxxx111101xxxxxxxxxx", AInstEmit.Fmin_V, typeof(AOpCodeSimdReg)); SetA64("000111100x1xxxxx011110xxxxxxxxxx", AInstEmit.Fminnm_S, typeof(AOpCodeSimdReg)); SetA64("0>0011101<1xxxxx110001xxxxxxxxxx", AInstEmit.Fminnm_V, typeof(AOpCodeSimdReg)); + SetA64("0>1011101<1xxxxx111101xxxxxxxxxx", AInstEmit.Fminp_V, typeof(AOpCodeSimdReg)); SetA64("010111111<<xxxxx0001x0xxxxxxxxxx", AInstEmit.Fmla_Se, typeof(AOpCodeSimdRegElemF)); SetA64("0>0011100<1xxxxx110011xxxxxxxxxx", AInstEmit.Fmla_V, typeof(AOpCodeSimdReg)); SetA64("0x0011111<<xxxxx0001x0xxxxxxxxxx", AInstEmit.Fmla_Ve, typeof(AOpCodeSimdRegElemF)); |