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authorgdkchan <gab.dark.100@gmail.com>2023-01-10 19:16:59 -0300
committerGitHub <noreply@github.com>2023-01-10 19:16:59 -0300
commit5e0f8e873857ce3ca3f532aff0936beb28e412c8 (patch)
tree576e5110c076b7d1f4d94e608ee21493f5b48879 /ARMeilleure/Optimizations.cs
parentd16288a2a87f0979df30ba69d4fe10660177b6ac (diff)
Implement JIT Arm64 backend (#4114)
* Implement JIT Arm64 backend * PPTC version bump * Address some feedback from Arm64 JIT PR * Address even more PR feedback * Remove unused IsPageAligned function * Sync Qc flag before calls * Fix comment and remove unused enum * Address riperiperi PR feedback * Delete Breakpoint IR instruction that was only implemented for Arm64
Diffstat (limited to 'ARMeilleure/Optimizations.cs')
-rw-r--r--ARMeilleure/Optimizations.cs5
1 files changed, 5 insertions, 0 deletions
diff --git a/ARMeilleure/Optimizations.cs b/ARMeilleure/Optimizations.cs
index 97defd9a..0810d96c 100644
--- a/ARMeilleure/Optimizations.cs
+++ b/ARMeilleure/Optimizations.cs
@@ -1,4 +1,5 @@
using ARMeilleure.CodeGen.X86;
+using System.Runtime.Intrinsics.Arm;
namespace ARMeilleure
{
@@ -9,6 +10,8 @@ namespace ARMeilleure
public static bool AllowLcqInFunctionTable { get; set; } = true;
public static bool UseUnmanagedDispatchLoop { get; set; } = true;
+ public static bool UseAdvSimdIfAvailable { get; set; } = true;
+
public static bool UseSseIfAvailable { get; set; } = true;
public static bool UseSse2IfAvailable { get; set; } = true;
public static bool UseSse3IfAvailable { get; set; } = true;
@@ -30,6 +33,8 @@ namespace ARMeilleure
set => HardwareCapabilities.ForceLegacySse = value;
}
+ internal static bool UseAdvSimd => UseAdvSimdIfAvailable && AdvSimd.IsSupported;
+
internal static bool UseSse => UseSseIfAvailable && HardwareCapabilities.SupportsSse;
internal static bool UseSse2 => UseSse2IfAvailable && HardwareCapabilities.SupportsSse2;
internal static bool UseSse3 => UseSse3IfAvailable && HardwareCapabilities.SupportsSse3;