Implement JIT Arm64 backend (#4114)

* Implement JIT Arm64 backend

* PPTC version bump

* Address some feedback from Arm64 JIT PR

* Address even more PR feedback

* Remove unused IsPageAligned function

* Sync Qc flag before calls

* Fix comment and remove unused enum

* Address riperiperi PR feedback

* Delete Breakpoint IR instruction that was only implemented for Arm64

4 files changed, 35 insertions, 0 deletions

diff --git a/ARMeilleure/Native/JitSupportDarwin.cs b/ARMeilleure/Native/JitSupportDarwin.cs
new file mode 100644
index 00000000..7d6a8634
--- /dev/null
+++ b/ARMeilleure/Native/JitSupportDarwin.cs
@@ -0,0 +1,13 @@
+using System;
+using System.Runtime.InteropServices;
+using System.Runtime.Versioning;
+
+namespace ARMeilleure.Native
+{
+    [SupportedOSPlatform("macos")]
+    public static partial class JitSupportDarwin
+    {
+        [LibraryImport("libarmeilleure-jitsupport", EntryPoint = "armeilleure_jit_memcpy")]
+        public static partial void Copy(IntPtr dst, IntPtr src, ulong n);
+    }
+}
diff --git a/ARMeilleure/Native/libs/libarmeilleure-jitsupport.dylib b/ARMeilleure/Native/libs/libarmeilleure-jitsupport.dylib
new file mode 100644
index 00000000..c65b0a4e
--- /dev/null
+++ b/ARMeilleure/Native/libs/libarmeilleure-jitsupport.dylib
diff --git a/ARMeilleure/Native/macos_jit_support/Makefile b/ARMeilleure/Native/macos_jit_support/Makefile
new file mode 100644
index 00000000..d6da35d5
--- /dev/null
+++ b/ARMeilleure/Native/macos_jit_support/Makefile
@@ -0,0 +1,8 @@
+NAME = libarmeilleure-jitsupport.dylib
+
+all: ${NAME}
+
+${NAME}:
+	clang -O3 -dynamiclib support.c -o ${NAME}
+clean:
+	rm -f ${NAME}
diff --git a/ARMeilleure/Native/macos_jit_support/support.c b/ARMeilleure/Native/macos_jit_support/support.c
new file mode 100644
index 00000000..1b13d906
--- /dev/null
+++ b/ARMeilleure/Native/macos_jit_support/support.c
@@ -0,0 +1,14 @@
+#include <stddef.h>
+#include <string.h>
+#include <pthread.h>
+
+#include <libkern/OSCacheControl.h>
+
+void armeilleure_jit_memcpy(void *dst, const void *src, size_t n) {
+    pthread_jit_write_protect_np(0);
+    memcpy(dst, src, n);
+    pthread_jit_write_protect_np(1);
+
+    // Ensure that the instruction cache for this range is invalidated.
+    sys_icache_invalidate(dst, n);
+}