diff options
| author | TSR Berry <20988865+TSRBerry@users.noreply.github.com> | 2023-04-08 01:22:00 +0200 |
|---|---|---|
| committer | Mary <thog@protonmail.com> | 2023-04-27 23:51:14 +0200 |
| commit | cee712105850ac3385cd0091a923438167433f9f (patch) | |
| tree | 4a5274b21d8b7f938c0d0ce18736d3f2993b11b1 /ARMeilleure/Decoders/OpCodeSimdReg.cs | |
| parent | cd124bda587ef09668a971fa1cac1c3f0cfc9f21 (diff) | |
Move solution and projects to src
Diffstat (limited to 'ARMeilleure/Decoders/OpCodeSimdReg.cs')
| -rw-r--r-- | ARMeilleure/Decoders/OpCodeSimdReg.cs | 18 |
1 files changed, 0 insertions, 18 deletions
diff --git a/ARMeilleure/Decoders/OpCodeSimdReg.cs b/ARMeilleure/Decoders/OpCodeSimdReg.cs deleted file mode 100644 index ac4f71da..00000000 --- a/ARMeilleure/Decoders/OpCodeSimdReg.cs +++ /dev/null @@ -1,18 +0,0 @@ -namespace ARMeilleure.Decoders -{ - class OpCodeSimdReg : OpCodeSimd - { - public bool Bit3 { get; } - public int Ra { get; } - public int Rm { get; protected set; } - - public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCodeSimdReg(inst, address, opCode); - - public OpCodeSimdReg(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode) - { - Bit3 = ((opCode >> 3) & 0x1) != 0; - Ra = (opCode >> 10) & 0x1f; - Rm = (opCode >> 16) & 0x1f; - } - } -}
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