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authorTSR Berry <20988865+TSRBerry@users.noreply.github.com>2023-04-08 01:22:00 +0200
committerMary <thog@protonmail.com>2023-04-27 23:51:14 +0200
commitcee712105850ac3385cd0091a923438167433f9f (patch)
tree4a5274b21d8b7f938c0d0ce18736d3f2993b11b1 /ARMeilleure/Decoders/OpCode32SimdSel.cs
parentcd124bda587ef09668a971fa1cac1c3f0cfc9f21 (diff)
Move solution and projects to src
Diffstat (limited to 'ARMeilleure/Decoders/OpCode32SimdSel.cs')
-rw-r--r--ARMeilleure/Decoders/OpCode32SimdSel.cs23
1 files changed, 0 insertions, 23 deletions
diff --git a/ARMeilleure/Decoders/OpCode32SimdSel.cs b/ARMeilleure/Decoders/OpCode32SimdSel.cs
deleted file mode 100644
index 37fd714a..00000000
--- a/ARMeilleure/Decoders/OpCode32SimdSel.cs
+++ /dev/null
@@ -1,23 +0,0 @@
-namespace ARMeilleure.Decoders
-{
- class OpCode32SimdSel : OpCode32SimdRegS
- {
- public OpCode32SimdSelMode Cc { get; }
-
- public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdSel(inst, address, opCode, false);
- public new static OpCode CreateT32(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdSel(inst, address, opCode, true);
-
- public OpCode32SimdSel(InstDescriptor inst, ulong address, int opCode, bool isThumb) : base(inst, address, opCode, isThumb)
- {
- Cc = (OpCode32SimdSelMode)((opCode >> 20) & 3);
- }
- }
-
- enum OpCode32SimdSelMode : int
- {
- Eq = 0,
- Vs,
- Ge,
- Gt
- }
-}