diff options
| author | jduncanator <1518948+jduncanator@users.noreply.github.com> | 2020-03-05 11:41:33 +1100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-03-05 11:41:33 +1100 |
| commit | 68e15c1a7471e4b2844fc0d3c7385523e595521d (patch) | |
| tree | 3783af4216d1e4b31135d8055ea5bcd44a69276e /ARMeilleure/Decoders/OpCode32SimdRev.cs | |
| parent | d9ed827696700ef5b9b777031bab451f23fb837c (diff) | |
Implement Fast Paths for most A32 SIMD instructions (#952)
* Begin work on A32 SIMD Intrinsics
* More instructions, some cleanup.
* Intrinsics for Move instructions (zip etc)
These pass the existing tests.
* Intrinsics for some of Cvt
While doing this I noticed that the conversion for int/fp was incorrect
in the slow path. I'll fix this in the original repo.
* Intrinsics for more Arithmetic instructions.
* Intrinsics for Vext
* Fix VEXT Intrinsic for double words.
* Use InsertPs to move scalar values.
* Cleanup, fix VPADD.f32 and VMIN signed integer.
* Cleanup, add SSE2 support for scalar insert.
Works similarly to the IR scalar insert, but obviously this one works
directly on V128.
* Minor cleanup.
* Enable intrinsic for FP64 to integer conversion.
* Address feedback apart from splitting out intrinsic float abs
Also: bad VREV encodings as undefined rather than throwing in translation.
* Move float abs to helper, fix bug with cvt
* Rename opc2 & 3 to match A32 docs, use ArgumentOutOfRangeException appropriately.
* Get name of variable at compilation rather than string literal.
* Use correct double sign mask.
Diffstat (limited to 'ARMeilleure/Decoders/OpCode32SimdRev.cs')
| -rw-r--r-- | ARMeilleure/Decoders/OpCode32SimdRev.cs | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/ARMeilleure/Decoders/OpCode32SimdRev.cs b/ARMeilleure/Decoders/OpCode32SimdRev.cs index 6cdf9f57..547766a8 100644 --- a/ARMeilleure/Decoders/OpCode32SimdRev.cs +++ b/ARMeilleure/Decoders/OpCode32SimdRev.cs @@ -4,6 +4,12 @@ { public OpCode32SimdRev(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode) { + if (Opc + Size >= 3) + { + Instruction = InstDescriptor.Undefined; + return; + } + // Currently, this instruction is treated as though it's OPCODE is the true size, // which lets us deal with reversing vectors on a single element basis (eg. math magic an I64 rather than insert lots of I8s). int tempSize = Size; |
