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| author | gdkchan <gab.dark.100@gmail.com> | 2020-10-21 09:13:44 -0300 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-10-21 09:13:44 -0300 |
| commit | 2f164917126ecef3a44c989e9442d2c663e58535 (patch) | |
| tree | b3a37b665bcebfe5c93108992a97fe90512f88dc /ARMeilleure/Decoders/OpCode32SimdRegS.cs | |
| parent | efa77a241555efa3ddfa3425919211ce6c8134a7 (diff) | |
Get rid of Reflection.Emit dependency on CPU and Shader projects (#1626)
* Get rid of Reflection.Emit dependency on CPU and Shader projects
* Remove useless private sets
* Missed those due to the alignment
Diffstat (limited to 'ARMeilleure/Decoders/OpCode32SimdRegS.cs')
| -rw-r--r-- | ARMeilleure/Decoders/OpCode32SimdRegS.cs | 6 |
1 files changed, 4 insertions, 2 deletions
diff --git a/ARMeilleure/Decoders/OpCode32SimdRegS.cs b/ARMeilleure/Decoders/OpCode32SimdRegS.cs index b4ffad80..07dffb4f 100644 --- a/ARMeilleure/Decoders/OpCode32SimdRegS.cs +++ b/ARMeilleure/Decoders/OpCode32SimdRegS.cs @@ -2,7 +2,9 @@ { class OpCode32SimdRegS : OpCode32SimdS { - public int Vn { get; private set; } + public int Vn { get; } + + public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdRegS(inst, address, opCode); public OpCode32SimdRegS(InstDescriptor inst, ulong address, int opCode) : base(inst, address, opCode) { @@ -10,7 +12,7 @@ if (single) { Vn = ((opCode >> 7) & 0x1) | ((opCode >> 15) & 0x1e); - } + } else { Vn = ((opCode >> 3) & 0x10) | ((opCode >> 16) & 0xf); |