diff options
| author | TSR Berry <20988865+TSRBerry@users.noreply.github.com> | 2023-04-08 01:22:00 +0200 |
|---|---|---|
| committer | Mary <thog@protonmail.com> | 2023-04-27 23:51:14 +0200 |
| commit | cee712105850ac3385cd0091a923438167433f9f (patch) | |
| tree | 4a5274b21d8b7f938c0d0ce18736d3f2993b11b1 /ARMeilleure/Decoders/OpCode32SimdReg.cs | |
| parent | cd124bda587ef09668a971fa1cac1c3f0cfc9f21 (diff) | |
Move solution and projects to src
Diffstat (limited to 'ARMeilleure/Decoders/OpCode32SimdReg.cs')
| -rw-r--r-- | ARMeilleure/Decoders/OpCode32SimdReg.cs | 25 |
1 files changed, 0 insertions, 25 deletions
diff --git a/ARMeilleure/Decoders/OpCode32SimdReg.cs b/ARMeilleure/Decoders/OpCode32SimdReg.cs deleted file mode 100644 index 1c46b0e0..00000000 --- a/ARMeilleure/Decoders/OpCode32SimdReg.cs +++ /dev/null @@ -1,25 +0,0 @@ -namespace ARMeilleure.Decoders -{ - class OpCode32SimdReg : OpCode32Simd - { - public int Vn { get; } - - public int Qn => GetQuadwordIndex(Vn); - public int In => GetQuadwordSubindex(Vn) << (3 - Size); - public int Fn => GetQuadwordSubindex(Vn) << (1 - (Size & 1)); - - public new static OpCode Create(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdReg(inst, address, opCode, false); - public new static OpCode CreateT32(InstDescriptor inst, ulong address, int opCode) => new OpCode32SimdReg(inst, address, opCode, true); - - public OpCode32SimdReg(InstDescriptor inst, ulong address, int opCode, bool isThumb) : base(inst, address, opCode, isThumb) - { - Vn = ((opCode >> 3) & 0x10) | ((opCode >> 16) & 0xf); - - // Subclasses have their own handling of Vx to account for before checking. - if (GetType() == typeof(OpCode32SimdReg) && DecoderHelper.VectorArgumentsInvalid(Q, Vd, Vm, Vn)) - { - Instruction = InstDescriptor.Undefined; - } - } - } -} |
