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authorgdkchan <gab.dark.100@gmail.com>2020-07-30 11:29:28 -0300
committerGitHub <noreply@github.com>2020-07-30 11:29:28 -0300
commit9878fc2d3cf4c64f56c44c2a5de013acb6bcbade (patch)
tree8f5e5cde68fec213ab61dbee0e121448f0970ca2 /ARMeilleure/CodeGen/X86/X86Instruction.cs
parent57bb0abda3dc277dc7575250fdb080edb83abcbc (diff)
Implement inline memory load/store exclusive and ordered (#1413)
* Implement inline memory load/store exclusive * Fix missing REX prefix on 8-bits CMPXCHG * Increment PTC version due to bugfix * Remove redundant memory checks * Address PR feedback * Increment PPTC version
Diffstat (limited to 'ARMeilleure/CodeGen/X86/X86Instruction.cs')
-rw-r--r--ARMeilleure/CodeGen/X86/X86Instruction.cs1
1 files changed, 1 insertions, 0 deletions
diff --git a/ARMeilleure/CodeGen/X86/X86Instruction.cs b/ARMeilleure/CodeGen/X86/X86Instruction.cs
index 9ac17e5b..f9b35d37 100644
--- a/ARMeilleure/CodeGen/X86/X86Instruction.cs
+++ b/ARMeilleure/CodeGen/X86/X86Instruction.cs
@@ -30,6 +30,7 @@ namespace ARMeilleure.CodeGen.X86
Cmpss,
Cmpxchg,
Cmpxchg16b,
+ Cmpxchg8,
Comisd,
Comiss,
Cpuid,