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| author | LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com> | 2020-11-18 19:35:54 +0100 |
|---|---|---|
| committer | GitHub <noreply@github.com> | 2020-11-18 19:35:54 +0100 |
| commit | 0679084f115b6838dec4d8c5e85044c33d4122d0 (patch) | |
| tree | 0d25ace42740e37d6bb2a8cd30fa92c5313d265a /ARMeilleure/CodeGen/X86/X86Instruction.cs | |
| parent | eafee34feebd432151809df402f3f696e4d93d08 (diff) | |
CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & Fcvtn_V Instructions. Now HardwareCapabilities uses CpuId. (#1650)
* net5.0
* CPU (A64): Add FP16/FP32 fast paths (F16C Intrinsics) for Fcvt_S, Fcvtl_V & Fcvtn_V Instructions. Switch to .NET 5.0.
Nits.
Tests performed successfully in both debug and release mode (for all instructions involved).
* Address comment.
* Update appveyor.yml
* Revert "Update appveyor.yml"
This reverts commit 27cdd59e8b90e227e6924d9c162af26c00a89013.
* Remove Assembler CpuId.
* Update appveyor.yml
* Address comment.
Diffstat (limited to 'ARMeilleure/CodeGen/X86/X86Instruction.cs')
| -rw-r--r-- | ARMeilleure/CodeGen/X86/X86Instruction.cs | 3 |
1 files changed, 2 insertions, 1 deletions
diff --git a/ARMeilleure/CodeGen/X86/X86Instruction.cs b/ARMeilleure/CodeGen/X86/X86Instruction.cs index f9b35d37..fae17b86 100644 --- a/ARMeilleure/CodeGen/X86/X86Instruction.cs +++ b/ARMeilleure/CodeGen/X86/X86Instruction.cs @@ -33,7 +33,6 @@ namespace ARMeilleure.CodeGen.X86 Cmpxchg8, Comisd, Comiss, - Cpuid, Crc32, Crc32_16, Crc32_8, @@ -199,6 +198,8 @@ namespace ARMeilleure.CodeGen.X86 Unpcklps, Vblendvpd, Vblendvps, + Vcvtph2ps, + Vcvtps2ph, Vpblendvb, Xor, Xorpd, |