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authorgdkchan <gab.dark.100@gmail.com>2020-07-30 11:29:28 -0300
committerGitHub <noreply@github.com>2020-07-30 11:29:28 -0300
commit9878fc2d3cf4c64f56c44c2a5de013acb6bcbade (patch)
tree8f5e5cde68fec213ab61dbee0e121448f0970ca2 /ARMeilleure/CodeGen/X86/PreAllocator.cs
parent57bb0abda3dc277dc7575250fdb080edb83abcbc (diff)
Implement inline memory load/store exclusive and ordered (#1413)
* Implement inline memory load/store exclusive * Fix missing REX prefix on 8-bits CMPXCHG * Increment PTC version due to bugfix * Remove redundant memory checks * Address PR feedback * Increment PPTC version
Diffstat (limited to 'ARMeilleure/CodeGen/X86/PreAllocator.cs')
-rw-r--r--ARMeilleure/CodeGen/X86/PreAllocator.cs6
1 files changed, 4 insertions, 2 deletions
diff --git a/ARMeilleure/CodeGen/X86/PreAllocator.cs b/ARMeilleure/CodeGen/X86/PreAllocator.cs
index dc7f3a75..b76e9416 100644
--- a/ARMeilleure/CodeGen/X86/PreAllocator.cs
+++ b/ARMeilleure/CodeGen/X86/PreAllocator.cs
@@ -101,7 +101,7 @@ namespace ARMeilleure.CodeGen.X86
if (callConv == CallConvName.Windows)
{
HandleTailcallWindowsAbi(block.Operations, stackAlloc, node, operation);
- }
+ }
else
{
HandleTailcallSystemVAbi(block.Operations, stackAlloc, node, operation);
@@ -207,6 +207,8 @@ namespace ARMeilleure.CodeGen.X86
switch (operation.Instruction)
{
case Instruction.CompareAndSwap:
+ case Instruction.CompareAndSwap16:
+ case Instruction.CompareAndSwap8:
{
OperandType type = operation.GetSource(1).Type;
@@ -887,7 +889,7 @@ namespace ARMeilleure.CodeGen.X86
HandleConstantRegCopy(nodes, nodes.AddBefore(node, copyOp), copyOp);
sources.Add(argReg);
- }
+ }
else
{
throw new NotImplementedException("Spilling is not currently supported for tail calls. (too many arguments)");