diff options
| author | LDj3SNuD <35856442+LDj3SNuD@users.noreply.github.com> | 2019-12-07 13:45:32 +0100 |
|---|---|---|
| committer | Ac_K <Acoustik666@gmail.com> | 2019-12-07 13:45:32 +0100 |
| commit | 8c85bdf2edf5ebd7965fbbd08106f2e8d877d73e (patch) | |
| tree | 1f112a5d4a6dc0b4c8882b8151623e006172bb6c /ARMeilleure/CodeGen/X86/PreAllocator.cs | |
| parent | d562ba37a0bc603e9719bb36dc9e7e9bf4406687 (diff) | |
Implemented fast paths for: (#841)
* cpu-misc_opt
* B = ~b
* ;
Diffstat (limited to 'ARMeilleure/CodeGen/X86/PreAllocator.cs')
| -rw-r--r-- | ARMeilleure/CodeGen/X86/PreAllocator.cs | 7 |
1 files changed, 5 insertions, 2 deletions
diff --git a/ARMeilleure/CodeGen/X86/PreAllocator.cs b/ARMeilleure/CodeGen/X86/PreAllocator.cs index a1490131..034a87ac 100644 --- a/ARMeilleure/CodeGen/X86/PreAllocator.cs +++ b/ARMeilleure/CodeGen/X86/PreAllocator.cs @@ -298,8 +298,11 @@ namespace ARMeilleure.CodeGen.X86 { IntrinsicOperation intrinOp = (IntrinsicOperation)operation; - // PBLENDVB last operand is always implied to be XMM0 when VEX is not supported. - if (intrinOp.Intrinsic == Intrinsic.X86Pblendvb && !HardwareCapabilities.SupportsVexEncoding) + // BLENDVPD, BLENDVPS, PBLENDVB last operand is always implied to be XMM0 when VEX is not supported. + if ((intrinOp.Intrinsic == Intrinsic.X86Blendvpd || + intrinOp.Intrinsic == Intrinsic.X86Blendvps || + intrinOp.Intrinsic == Intrinsic.X86Pblendvb) && + !HardwareCapabilities.SupportsVexEncoding) { Operand xmm0 = Xmm(X86Register.Xmm0, OperandType.V128); |